Method And Related Apparatus For Realizing Two-Port Synchronous Memory Device

Abstract

Method and related apparatus for realizing a two-port synchronous memory device with a single-port memory. Clock-triggered two-port synchronous memory device can synchronously receive reading and writing commands within a clock period to simultaneous execute these two commands, while a single port memory must execute a single reading and writing command sequentially. Since a single-port memory features a lower cost and a smaller layout area, the invention realizes a two-port synchronous memory device by making a single-port memory first execute one of the reading/writing commands and then the other command within a single clock period, such that the two commands are completed after a single clock period. Thus a two-port synchronous memory device can be realized with a single-port memory.

Dependencies are inferred from the claim text.