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US 2006/0143409 A1Published application
Method and apparatus for providing a low power mode for a processor while maintaining snoop throughput
AssigneeIntel Corporation
InventorsQuinn Merrell, R. O'Bleness, Sujat Jamil, Hang Nguyen
Life of this patent
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Abstract
A method and apparatus for providing a low power mode for a processor while maintaining snoop throughput are disclosed. In one embodiment, an apparatus includes a cache, a processor, and a frequency controller. The frequency controller is to operate the apparatus in a low power mode in which the operating frequency of the cache is higher than the operating frequency of the processor.
Claims16
An apparatus comprising:
- a first cache;
- a first processor;
- and
- a frequency controller to operate the apparatus in a low power mode in which the first cache operates at a first frequency and the first processor operates at a second frequency, wherein the first frequency is higher than the than second frequency.
1 more element
A method comprising:
- determining that a processor is to enter a low power mode;
- reducing the operational frequency of the processor but not the operational frequency of a cache supporting the processor.
A system comprising:
- a processor;
- a dynamic random access memory;
- a cache coupled to the dynamic random access memory to support the processor;
- and
- a frequency controller to operate the processor and the cache in a low power mode in which the cache operates at a first frequency and the processor operates at a second frequency, wherein the first frequency is higher than the than second frequency.
2 more elements
Dependencies are inferred from the claim text.