Pipelined look-up in a content addressable memory
OwnerSailesh Kottapalli, Udo Walterscheidt +1inventors
InventorsSailesh Kottapalli, Udo Walterscheidt, Michael Reitsma
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Abstract
A pipelined look-up in a content addressable memory disclosed. In one embodiment, a content addressable memory includes a first cell and a second cell. The first cell is to compare a first bit of look-up data to a first bit of stored data. The second cell is to compare a second bit of look-up data to a second bit of stored data, and to generate a signal to disable the first cell if the second bit of look-up data does not match the second bit of stored data.
Claims6
A content addressable memory comprising:
- a first cell to compare a first bit of look-up data to a first bit of stored data;
- and
- a second cell to compare a second bit of look-up data to a second bit of stored data and to generate a signal to disable the first cell if the second bit of look-up data does not match the second bit of stored data.
A content addressable memory comprising:
- a plurality of entry locations, each entry location including:
- a first plurality of cells having first comparison logic to assert a first hit signal if a first portion of stored data matches a first portion of look-up data before a transition of a clock signal;
- and
- a second plurality of cells having second comparison logic to assert a second hit signal if the first hit signal is asserted and a second portion of stored data matches a second portion of look-up data after the transition of the clock signal, wherein the second comparison logic is disabled if the first hit signal is not asserted.
A method comprising:
- comparing a first plurality of bits of look-up data to a first plurality of bits of data stored in an entry location in a content addressable memory;
- and
- disabling a comparison of a second plurality of bits of look-up data to a second plurality of bits stored in the entry location if the first plurality of bits of look-up data does not match the first plurality of bits of data stored in the entry location.
A system comprising:
- a dynamic random access memory;
- and
- a processor including a content addressable memory having:
- a first cell to compare a first bit of look-up data to a first bit of stored data;
- and
- a second cell to compare a second bit of look-up data to a second bit of stored data and to generate a signal to disable the first cell if the second bit of look-up data does not match the second bit of stored data.
Dependencies are inferred from the claim text.