System, method, and apparatus for extended serial peripheral interface

A system for serial interchip communication, comprising:

• a master module;
• a slave module;
• a chip select line between the master module and the slave module for control of the slave module by the master module;
• a clock line between the master module and the slave module for control of the slave module by the master module;
• and
• an interrupt line between the master module and the slave module that provides capability for the slave module to interrupt the master module.

An apparatus, comprising:

• a master device having connections for CS, CLK, MOSI, MISO, and IRQ signals;
• a slave device having connections for CS, CLK, MOSI, MISO, and IRQ signals;
• a control line connecting the master CS connection with the slave CS connection;
• a control line connecting the master CLK connection with the slave CLK connection;
• a control line connecting the master IRQ connection with the slave IRQ connection;
• a data line connecting the master MOSI connection with the slave MOSI connection;
• a data line connecting the master MISO connection with the slave MISO connection;
• wherein:
• the CS connection is utilized by the master device to enable the slave device;
• the CLK connection is utilized by the master device to clock data flow between the master device and the slave device;
• the IRQ connection is utilized by the slave device to alert the master device that the slave device has data to send to the master device;
• the IRQ connection is further utilized by the slave device to alert the master device that the slave device is ready to accept data from the master device;
• the MOSI connection is utilized to pass data from the master device to the slave device;
• and
• the MISO connection is utilized to pass data from the slave device to the master device.