Direct memory access (DMA) address translation between peer-to-peer input/output (I/O) devices
AssigneeIntel Corporation
InventorsRajesh Madukkarumukumana, James Sutton, Ioannis Schoinas, Richard Uhlig
Life of this patent
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Abstract
A method and apparatus is described herein for supporting direct memory accesses between peer I/O devices. It is determined whether a guest physical address (GPA) referenced by an access generated from an I/O device, is within a range of GPAs associated with local I/O devices based at least in part on a GPA base and a GPA window size. If the GPA is within the window, then the GPA is translated to an HPA based at least in part on a base HPA associated with a local device and then forwarded to that local device. However, if the GPA is not within the window, then the access is forwarded upstream.
Claims38
A method comprising:
- determining if a request generated by a first I/O device references a first address within a range of addresses associated with a local I/O device;
- forwarding the request upstream toward primary translation logic, if the first address is not within the range of addresses associated with the local I/O device;
- and
- forwarding the request to the local I/O device, if the first address is within the range of addresses associated with the local I/O device without forwarding the request upstream.
A method comprising:
- determining if a first address referenced by a request is within a window of addresses associated with a first I/O device of a plurality of I/O devices coupled to a switch, the switch operable to be coupled in a peripheral bus hierarchy;
- and
- translating the first address to a second address based at least in part on a base address associated with the first I/O device, if the first address is within the window of addresses associated with the first I/O device.
A computer system comprising:
- a processor to execute a virtual machine monitor (VMM), the VMM to interface with a plurality of virtual machines (VMs);
- a controller hub coupled to the processor and memory, the controller hub having translation logic to translate between guest physical addresses (GPAs) and host physical addresses (HPAs);
- at least one bridge coupled to the controller hub through an interconnect;
- a plurality of I/O devices coupled to the bridge;
- and
- logic in the bridge, when enabled, to
- determine if an access referencing a first GPA is within a range of GPAs associated with any one of the plurality of I/O devices coupled to the bridge,
- translate the first GPA to a first HPA based at least in part on a base HPA, if the first GPA is within a range of GPAs associated with any one of the plurality of I/O devices coupled to the bridge, and
- forward the access referencing the first GPA upstream, if the first GPA is not within a range of GPAs associated with any one of the plurality of I/O devices;
- and
- the logic in the bridge, when disabled, to blindly forward the access referencing the first GPA upstream toward the controller hub.
An apparatus comprising:
- a plurality of ports to couple a plurality of input/output devices to, wherein at least one of the plurality of ports is coupled in a peripheral bus hierarchy;
- and
- remapping logic to remap a first address, which is referenced by an access received on one of the plurality of ports, to a second address, if the first address is within a window of addresses associated with a local input/output device of the plurality of input/output devices.
An apparatus comprising:
- a first input/output (I/O) device coupled to a bridge to generate an access, the access referencing a first guest address;
- a second I/O device coupled to the bridge;
- context logic in the bridge for storing a source identifier (ID) representing the first input/output device, as well as a base guest address, a guest size and a host base address for the second I/O device;
- and
- translation logic to provide a host address based at least in part on the first guest address, if the first guest address is within a window of guest addresses defined by the base guest address and the guest size.
Dependencies are inferred from the claim text.