Design methodology and manufacturing method for semiconductor memory
OwnerSatoru Akiyama, Tomonori Sekiguchi +2inventors
InventorsSatoru Akiyama, Tomonori Sekiguchi, Takayuki Kawahara, Kazuhiko Kajigaya
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OwnerSatoru Akiyama, Tomonori Sekiguchi +2inventors
InventorsSatoru Akiyama, Tomonori Sekiguchi, Takayuki Kawahara, Kazuhiko Kajigaya
Estimating the term…
A manufacturing method for semiconductor memory and a semiconductor design device, which can facilitate design and reduce a period of time required for the design, are provided. For example, when a designed memory array is verified, a read-out signal of a memory cell formulated by functions of respective parameters having various distributions is used. A value of the read-out signal is calculated by using a value extracted randomly from the distribution for each kind of parameter. Quality of the memory cell is determined from a calculated result. Calculation of the value of the read-out signal and determination of the quality of the memory cell are carried out to a great number of memory cells the memory array has. The total number of failed bits and the like obtained from these is used as an evaluation criterion.
A manufacturing method for a semiconductor memory, the method comprising the steps of:
A manufacturing method for a semiconductor memory, the method comprising the steps of:
A semiconductor design device realized by using a computer, the device comprising said computer including:
Dependencies are inferred from the claim text.