Circuit simulation method and circuit simulation apparatus

A circuit simulation apparatus comprising:

• means for acquiring a shape of a transistor and size data of an element isolating-purpose insulating film width contained in an integrated circuit from layout data of the integrated circuit;
• means for defining an isolation width parameter “Yeff” expressed by a formula of the element isolating-purpose insulating film width, and for forming an approximate expression as to an isolation width depending parameter whose value is changed, depending upon the isolation width parameter with respect to a transistor model formed based upon a transistor having a predetermined isolation width parameter;
• means for calculating a correcting value of an isolation width depending parameter as to a transistor model whose isolation width parameter is different from that of the transistor model based upon the approximate expression;
• means for replacing a transistor model formed based upon the transistor having the predetermined isolation width parameter by a transistor model formed based upon the isolation width depending parameter corrected by the approximate expression;
• and
• simulation executing means for reading a circuit connection description of the integrated circuit, for inputting a transistor model based upon the corrected isolation width depending parameter, and for calculating a characteristic of the transistor in which the element isolating-purpose insulating films are different from each other, while considering an element isolating-purpose insulating film depending characteristic.