Method and apparatus for generating a phase-locked output signal

A Fractional_N phase-locked loop, comprising:

• a divide ratio sequence generator operable to generate a temporally-varying divide ratio sequence;
• and
• a first phase-locked loop and a second phase-locked loop, each phase-locked loop comprising a phase comparator having a signal input, a feedback input and an output, and additionally comprising a loop filter, a VCO and a frequency divider, the loop filter, the VCO and the frequency divider connected in series between the output and the feedback input of the phase comparator;
• wherein:
• the signal input of one of the phase comparators is connected to the feedback input of the other of the phase comparators;
• the signal input of the other of the phase comparators is connected to receive an input signal;
• and
• the frequency dividers each have a divide ratio control input connected to the divide ratio sequence generator to receive the temporally-varying divide ratio.

A circuit for generating an output signal having a frequency defined by a divide ratio signal, the circuit comprising:

• a divide ratio sequence generator connected to receive the divide ratio signal;
• a first phase-locked loop and a second phase-locked loop, each phase-locked loop having a signal input, a feedback input and an output and comprising a frequency divider connected between the output and the feedback input;
• wherein:
• the signal input of the second phase-locked loop is connected to the feedback input of the first phase-locked loop;
• the output of the second phase-locked loop provides the output signal;
• and
• each frequency divider has a divide ratio control input connected to the divide ratio sequence generator.