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US 2006/0141777 A1Published application
Methods for patterning a layer of a semiconductor device
OwnerYeong-Sil Kiminventor
Life of this patent
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Abstract
A patterning layer of a single or multiple layer structure formed on a lower layer may be etched to form one or more steps therein, when the patterning layer is first dry etched to a partial depth thereof using a first resist pattern and then the patterning layer is etched again using a second resist pattern formed by lateral etching of the first resist pattern.
Claims12
A method for patterning a layer of a semiconductor device, comprising:
- forming a lower layer on a substrate;
- forming a patterning layer on the lower layer;
- forming a resist on the patterning layer;
- forming a first resist pattern by performing a lithographic process on the resist;
- partially dry etching the patterning layer using the first resist pattern as a mask such that the lower layer is not exposed;
- forming a second resist pattern by dry etching a lateral side of the first resist pattern;
- and
- dry etching the patterning layer using the second resist pattern such that the lower layer is exposed.
5 more elements
A method for patterning a layer of a semiconductor device, comprising:
- forming a lower layer on a substrate;
- sequentially forming first and second patterning layers on the lower layer;
- forming a resist on the patterning layers;
- forming a first resist pattern by performing a lithographic process on the resist;
- dry etching the second patterning layer using the first resist pattern as a mask;
- forming a second resist pattern by dry etching a lateral side of the first resist pattern;
- and
- dry etching the first and second patterning layers using the second resist pattern as a mask.
5 more elements
Dependencies are inferred from the claim text.