Methods of forming interconnection lines in semiconductor devices
AssigneeDongbu Electronics Co., Ltd.
InventorKwan-Ju Koh
Life of this patent
Estimating the term…
Abstract
The present disclosure improves characteristics and reliability of a device by preventing seams within a copper layer, wherein seams are created when forming a copper line by a damascene process. Such seams created within a first and a second copper layer are prevented by a process in which the first copper layer and the second copper layer are deposited at constant speeds when the first copper layer is firstly formed only in a via hole by leaving a first copper seed layer only in the via hole, and then the second copper layer is formed in a trench by forming a second copper seed layer in the trench.
Claims5
A method of forming an interconnection line in a semiconductor device, comprising:
- forming an interlayer insulating layer on a semiconductor substrate;
- forming a via hole to partially expose the semiconductor substrate by etching the interlayer insulating layer;
- forming a first copper seed layer on the via hole and a surface of the interlayer insulating layer;
- forming a photoresist layer on the first copper seed layer to fill in the via hole;
- forming a line-shaped trench having the via hole on an upper part of the via hole by sequentially etching the photoresist layer, the first copper seed layer, and an upper part of the interlayer insulating layer;
- forming a damascene structure including the via hole and the trench by removing a photoresist layer filling in the via hole to a degree that a first copper seed layer in the via hole is exposed;
- forming a first copper layer only in the via hole using the exposed first copper seed layer;
- removing the photoresist layer completely;
- forming a second copper seed layer on an entire surface of the substrate;
- and
- forming a second copper layer in the interlayer insulating layer and the trench using the second copper seed layer.
Dependencies are inferred from the claim text.