Method of manufacturing MOS transistor
AssigneeDongbuAnam Semiconductor Inc.
InventorHak-Dong Kim
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Abstract
A method of manufacturing a MOS transistor capable of suppressing a short channel effect by suppressing boron (B) ion diffusion in the MOS transistor. The method includes steps of: forming an impurity diffusion suppressing layer in an active region of a semiconductor substrate; forming an impurity layer containing boron ions in a lower portion of the impurity diffusion suppressing layer; and thermally treating on the substrate, wherein the impurity diffusion suppressing layer suppresses diffusion of the boron ions during the thermal treatment step.
Claims24
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A method of manufacturing a MOS transistor, comprising steps of:
- implanting germanium ions to form a germanium implant layer in a surface of an active region defined by an isolation layer in a substrate;
- implanting boron ions in the active region of the substrate to form a threshold voltage adjustment layer, the threshold voltage adjustment layer having a greater peak concentration depth than the germanium implant layer;
- and
- thermally treating the substrate.
A method of manufacturing a MOS transistor, comprising steps of:
- implanting nitrogen ions in a semiconductor substrate having an active region defined by an isolation layer and a gate insulating layer and a gate thereon to form a nitrogen implant layer in the surface of the substrate on both sides of the gate;
- implanting boron ions in the substrate to form lightly doped drain regions on both sides of the gate
- forming halo regions in a lower portion of the lightly doped drain regions by implanting third ions;
- forming spacers on sidewalls of the gate;
- implanting fourth ions in the substrate on both sides of the spacers to form source/drain regions;
- and
- thermally treating the substrate.
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Dependencies are inferred from the claim text.