Method of fabricating MOS transistor
AssigneeDongbu Electronics Co., Ltd.
InventorYong Lee
Life of this patent
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Abstract
A method for fabricating a MOS transistor is suitable for modifying the configuration of a gate electrode. The method includes coating a first oxide layer on a semiconductor substrate and removing a predetermined width of the first oxide layer; forming an LDD region in the substrate; forming a gate spacer on the substrate; forming a channel in the LDD region, forming a gate oxide layer; forming a polysilicon gate electrode; and forming source/drain diffusion regions. Accordingly, a line width of the gate electrode can be reduced without employing lithography of high precision, and an area reserved for salicide can be maximally secured on the gate and source/drain regions.
Claims9
A method of fabricating a MOS transistor, comprising steps of:
- coating a semiconductor substrate with a first oxide layer and removing a predetermined width of the first oxide layer by performing a photolithography process to the first oxide layer;
- forming a lightly doped drain (LDD) region by ion implantation and annealing using the first oxide layer as a barrier wherein the ion implantation uses impurities of a conductive type opposite that of the semiconductor substrate;
- forming a gate spacer by coating the semiconductor substrate with a second oxide layer and etching the second oxide layer;
- forming a channel in the LDD region by ion implantation and annealing using the first oxide layer and the gate spacer as a barrier;
- forming a gate oxide layer on a surface of the semiconductor substrate between edges of the gate spacer;
- forming a polysilicon gate electrode by coating the first oxide layer, the gate spacer, and the gate oxide layer with a polysilicon layer and performing photolithography and etching processes to the polysilicon layer;
- and
- forming, by annealing, source/drain diffusion regions by ion implantation of impurities of a conductive type opposite that of the semiconductor substrate using the gate electrode and the gate spacer as a barrier.
A MOS transistor comprising:
- a semiconductor substrate with a first oxide layer;
- a lightly doped drain (LDD) region having a channel;
- a gate spacer including a second oxide layer;
- a gate oxide layer on a surface of the semiconductor substrate between edges of the gate spacer;
- a polysilicon gate electrode;
- a source diffusion region;
- and
- a drain diffusion region.
Dependencies are inferred from the claim text.