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US 2006/0141719 A1Published application
Method of fabricating semiconductor device
OwnerMyung Junginventor
Life of this patent
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Abstract
A gate is formed on a predetermined area of a substrate. A spacer insulating layer is formed on sidewalls of the gate. An insulating interlayer is formed over the substrate including the gate and the spacer insulating layer. Polymer generation is simultaneously carried out on a lateral side of the spacer while carrying out a dry etching process on the insulating interlayer. A sidewall spacer is left on both of the sidewalls of the polysilicon gate by performing wet etching to the insulating interlayer and the spacer insulating layer.
Claims10
A method of fabricating a semiconductor device, comprising:
- forming a gate on a predetermined area of a substrate;
- forming a spacer insulating layer on sidewalls of the gate;
- forming an insulating interlayer over the substrate, including the gate and the spacer insulating layer;
- simultaneously carrying out polymer generation on a lateral side of the spacer and a dry etching process on the insulating interlayer;
- and
- leaving a sidewall spacer on both of the sidewalls of the polysilicon gate by performing wet etching to the insulating interlayer and the spacer insulating layer.
3 more elements
Dependencies are inferred from the claim text.