# US 2006/0141700 A1 · Method for fabricating semiconductor memory device having recessed storage node contact plug

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- Number: US 2006/0141700 A1
- Document ID: US20060141700A1
- Status: Published application
- Kind: A1
- Application number: 11/321,634
- Filed: 2005-12-28
- Published: 2006-06-29
- Earliest claimed: 2004-12-28
- Assignees: Hynix Semiconductor Inc.
- Inventors: Ki-Won Nam
- Web page: https://patentgrep.com/patent/US20060141700A1

## CPC

- H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs}
- H10B 12/0335: {Making a connection between the transistor and the capacitor, e.g. plug}
- H10D 1/042: {using deposition processes to form electrode extensions}
- H10D 1/716: {having vertical extensions}
- H10W 20/046: {the barrier, adhesion or liner layers being associated with interconnections of capacitors}
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor memory device and a method for fabricating a semiconductor memory device are provided. The method includes forming an inter-layer insulation layer having a storage node contact hole on a substrate; forming a pair of storage node contact spacers on sidewalls of the storage node contact hole; forming a storage node contact plug surrounded by the storage node contact spacers inside the storage node contact hole; recessing a surface of the storage node contact plug to a predetermined depth to expose upper portions of the storage node contact spacers; forming an etch stop insulation layer on the surface of the storage node contact plug and the inter-layer insulation layer; forming a trench opening a predetermined portion of the storage node contact plug and the storage node spacers by etching the etch stop insulation layer; forming a bottom electrode on the trench; and sequentially forming a dielectric layer and a top electrode on the bottom electrode.

## Claims

### Claim 1

A method for fabricating a semiconductor memory device, comprising:
forming an inter-layer insulation layer having a storage node contact hole on a substrate;
forming a pair of storage node contact spacers recess to a predetermined thickness on sidewalls of the storage node contact hole;
forming a storage node contact plug surrounded by the storage node contact spacers inside the storage node contact hole;
recessing a surface of the storage node contact plug to a predetermined depth to expose upper portions of the storage node contact spacers;
forming an etch stop insulation layer on the surface of the storage node contact plug and the inter-layer insulation layer;
forming a trench opening a predetermined portion of the storage node contact plug and the storage node spacers by etching the etch stop insulation layer;
forming a bottom electrode on the trench; and
sequentially forming a dielectric layer and a top electrode on the bottom electrode.

### Claim 2 (depends on 1)

The method of claim 1, wherein at the recessing of the storage node contact plug to the predetermined depth, the storage node contact plug is selectively etched by using a gas having a high etch selectivity of the storage node contact plug to the storage node contact spacers and the inter-layer insulation layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the storage node contact plug is a polysilicon layer and during the recessing of the storage node contact plug, a chlorine based gas is used.

### Claim 4 (depends on 3)

The method of claim 3, wherein the chlorine based gas uses one of chlorine (Cl2) gas and boron trichloride (BCl3) gas.

### Claim 5 (depends on 1)

The method of claim 1, wherein the upper portions of the storage node contact spacers are recessed to a thickness ranging from approximately 500 Å to approximately 1,000 Å.

### Claim 6 (depends on 2)

The method of claim 2, wherein the upper portions of the storage node contact spacers are recessed to a thickness ranging from approximately 500 Å to approximately 1,000 Å.

### Claim 7

A method for fabricating a semiconductor memory device, comprising:
forming an inter-layer insulation layer having a storage node contact hole on a substrate;
forming a pair of storage node contact spacers on sidewalls of the storage node contact hole;
forming a storage node contact plug surrounded by the storage node contact spacers inside the storage node hole;
recessing a surface of the storage node contact plug in a predetermined depth to expose upper portions of the storage node contact spacers;
forming an etch stop insulation layer and an insulation layer for a storage node on the recessed storage node contact plug and the inter-layer insulation layer;
sequentially performing a dry etching process on the insulation layer and on the etch stop insulation layer to form a trench opening the storage node contact spacers and the storage node contact plug;
forming a bottom electrode on the trench; and
sequentially forming a dielectric layer and a top electrode on the bottom electrode.

### Claim 8 (depends on 7)

The method of claim 7, wherein at the recessing of the storage node contact plug to the predetermined depth, the storage node contact plug is selectively etched by using a gas having a high etch selectivity of the storage node contact plug to the storage node contact spacers and the inter-layer insulation layer.

### Claim 9 (depends on 8)

The method of claim 8, wherein the etch gas includes a chlorine based gas.

### Claim 10 (depends on 9)

The method of claim 9, wherein the chlorine based gas is one of chlorine (Cl2) gas and boron trichloride (BCl3) gas.

### Claim 11 (depends on 7)

The method of claim 7, wherein the predetermined recess depth of the storage node contact plug ranges from approximately 500 Å to approximately 1,000 Å.