System circuit and method for transmitting media related data

A circuit for compensating for processing related delays associated with the transmission of two or more related component signals to two or more media presentation devices, wherein one component signal has a relatively greater processing related delay value than other component signals, said circuit comprising:

• a signal delay circuit or buffer adapted to introduce a delay to a component signal having a relatively smaller processing related delay value, such that the introduced delay combined with the smaller processing related delay value is substantially equal to a processing related delay value of the component signal having a relatively greater processing related delay value;

The circuit according to claim 15, wherein said controller instructs the delay circuit or buffer to introduce a delay to the audio component signal such that the introduced delay combined with the processing related delay associated with the audio component signal is substantially equal to the processing related delay of the video component signal.

A system for compensating for processing related delays associated with the transmission of two or more related component signals to two or more media presentation devices, wherein one component signal has a relatively greater processing related delay value than other component signals, said circuit comprising:

• a signal delay circuit or buffer coupled to a transmitter or to a receiver, said delay circuit or buffer adapted to introduce a delay to a component signal having a relatively smaller processing related delay value, such that the introduced delay combined with the smaller processing related delay value is substantially equal to a processing related delay value of the component signal having a relatively greater processing related delay value;

The circuit according to claim 17, further comprising a controller functionally associated with said delay circuit or buffer, wherein said controlled is adapted to instruct said delay circuit as to the magnitude of the delay to introduce.

The circuit according to claim 17, further comprising a controller functionally associated with said delay circuit or buffer, wherein said controlled is adapted to determine a processing related delay value for one or more component signals.

The circuit according to claim 20, wherein one of the component signals contains audio data and the processing related delay is primarily associated with the compression and/or decompression of the audio content.

The circuit according to claim 21, wherein the processing related delay associated with the video component signal is greater than the processing related delay associated with the audio component signal.

The circuit according to claim 22, wherein said controller instructs the delay circuit or buffer to introduced a delay to the audio component signal such that the introduced delay combined with the processing related delay associated with the audio component signal is substantially equal to the processing related delay of the video component signal.