System and method for gigabit media independence interface (GMII)-to-system packet interface level 3 (SPI-3) interface translation

A system for gigabit media independence interface (GMII)-to-system packet interface level 3 (SPI-3) interface translation, comprising:

• a first translation circuit for translating a GMII reception signal received from the GMII interface device into an SPI-3 reception signal synchronized with an SPI3 reference clock based on starting frame delimiter (SFD) pattern information in the GMII reception signal;
• and
• a second translation circuit for translating an SPI-3 transmission signal received from an SPI-3 interface device into a GMII transmission signal synchronized with a GMII reference clock by adding the SFD pattern information to the SPI-3 transmission signal.

A method for gigabit media independence interface (GMII)-to-system packet interface level 3 (SPI-3) interface translation, the method comprising the steps of:

• receiving a GMII reception signal from a GMII interface device;
• and
• translating the GMII reception signal received from the GMII interface device into an SPI-3 reception signal synchronized with an SPI3 reference clock based on starting frame delimiter (SFD) pattern information in the GMII reception signal.

A method for gigabit media independence interface (GMII)-to-system packet interface level 3 (SPI-3) interface translation, the method comprising the steps of:

• receiving an SPI 3 transmission signal from an SPI-3 interface device;
• and
• translating the SPI-3 transmission signal received from the SPI-3 interface device into a GMII transmission signal synchronized with a GMII reference clock by adding starting frame delimiter (SFD) pattern information to the SPI-3 transmission signal.