Blade server system with a management bus and method for managing the same

A blade server system comprising:

• a connection board for modular interconnection, including a plurality of communication paths for conducting a plurality of signals including a management bus signal group and a first bus signal group;
• a management module, removably connected to the connection board, for management of the blade server system using signals including the management bus signal group and the first bus signal group;
• and
• a removable module, removably connected to the connection board, the removable module comprising:
• a management bus interface circuit, in response to the management bus signal group, for selectively controlling application of power from a power source to the removable module and activation of function of the first bus signal group on the removable module.

A method for managing a system including a connection board for modular communication using a plurality of signal groups including a first signal group and a second signal group, the method comprising:

• providing a management module associated with the connection board for management of the system using at least the first signal group and the second signal group;
• detecting whether there is any removable module connected to the connection board;
• if a removable module is detected to be connected to the connection board, determining an address associated with the removable module through the first signal group;
• activating function of the second signal group with respect to the determined address on the removable module through the first signal group;
• acquiring module configuration information with respect to the determined address through the second signal group;
• and
• determining, at the management module, distribution of power from a power source to the system according to system configuration information including the module configuration information with respect to the determined address.

A blade server system, comprising:

• a middle plane board including a first connector;
• and
• a server blade including a second connector for electrically connected to the first connector, the second connector including a plurality of contacts in compliance with a connector specification, the contacts including:
• contacts A1 for conducting a signal indicating whether the server blade is present;
• contacts A2 and A3 for conducting a SCSI (small computer system interface) request signal;
• contacts A4 to A9, B8, B9, E1, E2, E4, E7, F2 to F11, G2, and G9 for conducting signals for SCSI channel byte signal pairs;
• contacts B4 and B5 for conducting SCSI input/output signals;
• contacts B6 and B7 for conducting selection signals;
• contacts C4 and C5 for conducting SCSI reset signals;
• contacts C6 and C7 for conducting SCSI message signals;
• contacts C8 and C9 for conducting SCSI command/data signals;
• contacts D4 and D5 for conducting SCSI attention signals;
• contacts D6 and D7 for conducting SCSI busy signals;
• contacts D8 and D9 for conducting SCSI acknowledge signals;
• contact E3 for conducting a SCSI differential sense input signal;
• contacts E8 and E9 for conducting SCSI high byte parity signals;
• contacts G10 and G11 for conducting SCSI low byte parity signals;
• contacts A10, A11, B10, B11, C10, C11, D10, D11, and E11 for conducting system 12V power signals;
• contact B1 for conducting a standby 5V power signal;
• contact B2 for conducting a standby 5V precharge power signal;
• contacts B3, C2, C3, and D3 for indicating an identification of the server blade;
• contacts C1 and D1 for conducting system 5V power signals;
• contact D2 for conducting a system 12V precharge power signal;
• contact F1 for conducting a chassis management module (CMM) flow control CTS signal;
• contact G1 for conducting a CMM flow control RTS signal;
• contact H1 for conducting an inter-integrated circuit (I2C) bus data signal for a display interface;
• contact H2 for conducting an I2C bus clock signal for a display interface;
• contact H3 for conducting a display signal for blue color;
• contact H4 for conducting a display signal for green color;
• contact H5 for conducting a display signal for red color;
• contact H6 for conducting a display vertical synchronous signal;
• contact H7 for conducting a display horizontal synchronous signal;
• contact H8 for conducting a USB negative signal;
• contact H9 for conducting a USB positive signal;
• contact H10 for conducting an I2C bus clock signal;
• contacts E10 and Y1 to Y11 for grounding;
• and
• contact H11 for conducting an I2C bus data signal.

A blade server system, comprising:

• a middle plane board for modular interconnection, including a first connector, the first connector including a plurality of contacts for conducting a management bus signal group for management of the blade server system;
• and
• a server blade including a second connector for electrically connected to the first connector, the second connector including a plurality of contacts in compliance with a connector specification, the contacts including:
• contacts A1 and B1 for conducting signals of fiber channel/GIGA network differential pair 1 transmitter;
• contacts A2 and B2 for conducting signals of fiber channel/GIGA network differential pair 1 receiver;
• contacts A3 and B3 for conducting signals of Infinite Band primary channel differential pair 1 receiver;
• contacts A4 and B4 for conducting signals of Infinite Band primary channel differential pair 2 receiver;
• contacts A5 and B5 for conducting signals of Infinite Band primary channel differential pair 3 receiver;
• contacts A6 and B6 for conducting signals of Infinite Band primary channel differential pair 4 receiver;
• contacts A7 and B7 for conducting signals of Infinite Band secondary channel differential pair 1 receiver;
• contacts A8 and B8 for conducting signals of Infinite Band secondary channel differential pair 2 receiver;
• contacts A9 and B9 for conducting signals of Infinite Band secondary channel differential pair 3 receiver;
• contacts A10 and B10 for conducting signals of Infinite Band secondary channel differential pair 4 receiver;
• contacts C1 and C10 for grounding;
• contacts D1 and E1 for conducting signals of fiber channel/GIGA network differential pair 2 transmitter;
• contacts D2 and E2 for conducting signals of fiber channel/GIGA network differential pair 2 receiver;
• contacts D3 and E3 for conducting signals of Infinite Band primary channel differential pair 1 transmitter;
• contacts D4 and E4 for conducting signals of Infinite Band primary channel differential pair 2 transmitter;
• contacts D5 and E5 for conducting signals of Infinite Band primary channel differential pair 3 transmitter;
• contacts D6 and E6 for conducting signals of Infinite Band primary channel differential pair 4 transmitter;
• contacts D7 and E7 for conducting signals of Infinite Band secondary channel differential pair 1 transmitter;
• contacts D8 and E8 for conducting signals of Infinite Band secondary channel differential pair 2 transmitter;
• contacts D9 and E9 for conducting signals of Infinite Band secondary channel differential pair 3 transmitter;
• contacts D10 and E10 for conducting signals of Infinite Band secondary channel differential pair 4 transmitter;
• contacts F1 and F10 for grounding;
• contact G1 for conducting a local bus function select enable0 signal;
• contact G2 for conducting a local bus function select enable2 signal;
• contacts G3 and G7 for conducting signals indicating local bus data bits [0:4];
• contact G8 for conducting a PS2 pointing device clock signal;
• contact G9 for conducting a PS2 keyboard clock signal;
• contact G10 for conducting a general purpose input/output (GPIO) signal for Infinite Band primary channel;
• contact H1 for conducting a signal for indicating whether a server blade is mated or not;
• contact H2 for conducting a local bus function select enable1 signal;
• contact H3 for conducting a local bus data bit signal;
• contact H4 for conducting a local bus strobe signal;
• contact H5 for conducting a chassis management module (CMM) receiving flow control signal;
• contact H6 for conducting a CMM transmission flow control signal;
• contact H7 for conducting a local bus reset signal;
• contact H8 for conducting a PS2 pointing device clock signal;
• contact H9 for conducting a PS2 keyboard clock signal;
• and
• contact H10 for conducting a general purpose input/output (GPIO) signal for Infinite Band primary channel,
• wherein the management bus signal group includes the local bus function select enable0 signal, the local bus function select enable1 signal, the local bus function select enable2 signal, the signals indicating local bus data bits [0:4], the local bus data bit signal, and the local bus strobe signal.

A blade server system, comprising:

• a middle plane board including a first connector;
• and
• a server blade including a second connector for electrically connected to the first connector, the second connector including a plurality of contacts in compliance with a connector specification, the contacts including:
• first and third contacts for conducting signals of fiber channel/GIGA network differential pair 1 transmitter;
• second and fourth contacts for conducting signals of fiber channel/GIGA network differential pair 1 receiver;
• fifth and seventh contacts for conducting signals of Infinite Band primary channel differential pair 2 transmitter;
• sixth and eighth contacts for conducting signals of Infinite Band primary channel differential pair 2 receiver;
• ninth and eleventh contacts for conducting signals of Infinite Band primary channel differential pair 4 receiver;
• tenth and twelfth contacts for conducting signals of Infinite Band secondary channel differential pair 4 receiver;
• thirteenth and fifteenth contacts for conducting signals of Infinite Band primary channel differential pair 3 receiver;
• fourteenth and sixteenth contacts for conducting signals of Infinite Band secondary channel differential pair 3 receiver;
• seventeenth and nineteenth contacts for conducting signals of Infinite Band primary channel differential pair 2 receiver;
• eighteenth and twentieth contacts for conducting signals of Infinite Band secondary channel differential pair 2 receiver;
• twenty first to twenty third contacts for conducting signals of Infinite Band primary channel differential pair 1 receiver;
• twenty second and twenty fourth contacts for conducting signals of Infinite Band secondary channel differential pair 1 receiver;
• twenty fifth and twenty seventh contacts for conducting signals of Infinite Band primary channel differential pair 4 transmitter;
• twenty sixth and twenty eighth contacts for conducting signals of Infinite Band secondary channel differential pair 4 transmitter;
• twenty ninth and thirty first contacts for conducting signals of Infinite Band primary channel differential pair 3 transmitter;
• thirtieth and thirty second contacts for conducting signals of Infinite Band secondary channel differential pair 3 transmitter;
• thirty third and thirty fifth contacts for conducting signals of Infinite Band primary channel differential pair 2 transmitter;
• thirty fourth and thirty sixth contacts for conducting signals of Infinite Band secondary channel differential pair 2 transmitter;
• thirty seventh and thirty ninth contacts for conducting signals of Infinite Band primary channel differential pair 1 transmitter;
• thirty eighth and fourtieth contacts for conducting signals of Infinite Band secondary channel differential pair 1 transmitter;
• a forty first contact for conducting a signal for indicating GIGA network operation;
• a forty second contact for conducting a GPIO signal for Infinite Band primary channel;
• a forty third contact for conducting a signal for indicating fiber channel operation;
• a forty fourth contact for conducting a GPIO signal for Infinite Band secondary channel;
• forty fifth and forth seventh contacts for conducting clock differential pair receiving signals for PCI Express B channel;
• a forty sixth contact for conducting a system management bus clock signal;
• a forty eight contact for conducting a system management bus data signal;
• forth ninth and fifty first contacts for conducting differential pair 0 receiver for PCI Express B channel;
• fifty and fifty second contacts for conducting differential pair 0 transmitter for PCI Express B channel;
• fifty third and fifty fifth contacts for conducting differential pair 1 receiver for PCI Express B channel;
• fifty fourth and fifty sixth contacts for conducting differential pair 1 transmitter for PCI Express B channel;
• fifty seventh and fifty ninth contacts for conducting differential pair 2 receiver for PCI Express B channel;
• fifty eighth and sixtieth contacts for conducting differential pair 2 transmitter for PCI Express B channel;
• sixty first and sixty third contacts for conducting differential pair 3 receiver for PCI Express B channel;
• sixty second and sixty fourth contacts for conducting differential pair 3 transmitter for PCI Express B channel;
• sixty fifth and sixty seventh contacts for conducting differential pair 4 receiver for PCI Express B channel;
• sixty sixth and sixty eighth contacts for conducting differential pair 4 transmitter for PCI Express B channel;
• sixty ninth and seventy first contacts for conducting differential pair 5 receiver for PCI Express B channel;
• seventieth and seventy second contacts for conducting differential pair 5 transmitter for PCI Express B channel;
• seventy third and seventy fifth contacts for conducting differential pair 6 receiver for PCI Express B channel;
• seventy fourth and seventy sixth contacts for conducting differential pair 6 transmitter for PCI Express B channel;
• seventy seventh and seventy ninth contacts for conducting differential pair 7 receiver for PCI Express B channel;
• seventy eighth and eightieth contacts for conducting differential pair 7 transmitter for PCI Express B channel;
• an eighty first contact for conducting a system power good signal;
• an eighty second contact for conducting a local area network (LAN) wake-up signal;
• eighty third and eighty fourth contacts for grounding;
• and
• contacts G1 to G12 for grounding.

A blade server system, comprising:

• a middle plane board including a first connector;
• and
• a server blade including a second connector for electrically connected to the first connector, the second connector including a plurality of contacts in compliance with a connector specification, the contacts including:
• first to ninth, 11th, 13th, 15th, 17th, 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33rd, 35th, 37th, 39th, 41st, 43rd, 45th, 47th, 49th, 51st, 53rd, 55th, 57th, 59th, 61st, 63rd, 65th, 67th, 69th, 71st, 73rd, 75th, 77th, 79th, 81st, 83rd, 85th, 87st, 89th, 91st, 93rd, 95th, 97th, 99th, 101st, 103rd, 105th, 107th, 109st, 111st, 113rd, 115th, 117th, and 119th contacts for conducting signals for PCI address/data;
• contacts G1 to G12 for grounding;
• a 10th contact for conducting a signal for indicating fiber channel present;
• 12th, 14th, 84th, and 86 contacts for conducting PCI interrupt signals;
• a 16th contact for conducting a PCI clock signal. The 18th contact for conducting a PCI reset signal;
• a 20th contact for conducting a PCI grant bus 0 signal;
• a 22th contact for conducting a PCI request bus 0 signal;
• a 24th contact for conducting a PCI parity signal;
• a 26th contact for conducting a PCI stop signal;
• a 28th contact for conducting a PCI device selection signal;
• a 30th contact for conducting a PCI target ready signal;
• a 32nd contact for conducting a PCI initiator ready signal;
• a 34th contact for conducting a PCI frame signal;
• a 36th contact for conducting a PCI system error signal;
• a 38th contact for conducting a PCI parity error signal;
• a 40th contact for conducting an I2C clock signal;
• 42nd, 44th, 46th, and 66th contacts for PCI bus command and byte enable signals;
• a 50th contact for conducting a 66 Mhz enable signal;
• a 52th contact for conducting a 64-bit acknowledge transfer signal;
• a 54th contact for conducting a 64-bit request transfer signal;
• a 56th contact for conducting a 64-bit parity check signal;
• a 58th contact for conducting an I2C data signal;
• a 68th contact for conducting a PCI-X capable signal;
• a 70th contact for conducting a PCI request bus 2 signal;
• a 72th contact for conducting a PCI grant bus 2 signal;
• a 74th contact for conducting a PCI clock signal;
• a 76th contact for conducting an initialization device selection 2 signal;
• a 78th contact for conducting an initialization device selection 1 signal;
• an 80th contact for conducting a PCI lock signal;
• an 82th contact for conducting a PCI power management event (PME) signal;
• an 88th contact for conducting a SCSI interrupt B signal;
• a 90th contact for conducting a SCSI interrupt A signal;
• a 92th contact for conducting a ZCR present signal;
• a 94th contact for conducting a ZCR grant bus signal;
• a 96th contact for conducting a standby 5V power signal;
• a 98th contact for conducting a standby 3.3V power signal;
• 100th, 102nd, 104th, and 106th contacts for conducting system 5V power signals;
• 108th, 110th, 112th, 114th, 116th, and 118th contacts for conducting system 3.3V power signals;
• and
• a 120th contact for conducting a system 12V power signal.

A blade server system, comprising:

• a middle plane board including a first connector;
• and
• a server blade including a second connector for electrically connected to the first connector, the second connector including a plurality of contacts in compliance with a connector specification, the contacts including:
• a first contact for conducting a PCI system error signal;
• a second contact for conducting a PCI parity error signal;
• a fourth contact for conducting a system management bus clock signal;
• a sixth contact for conducting a system management bus data signal;
• third, fifth, seventh, eighth, 13th to 16th, 22nd, 23rd, and 31st to 35th contacts for grounding;
• ninth to 12th contacts for conducting system 12V power signals;
• 17th to 21st contacts for conducting system 3.3V power signals;
• 24th, 26th, 28th, and 30th contacts for conducting system 5V power signals;
• 25th, 27th, and 29th contacts for conducting system 1.5V power signals;
• 36th and 38th contacts for conducting standby 3.3V power signals;
• a 37th contact for conducting a PCI present 1 signal;
• a 39th contact for conducting a PCI present 2 signal;
• and
• a 40th contact for conducting a PCI power management event (PME) signal.

A blade server system, comprising:

• a middle plane board including a first connector;
• and
• a server blade including a second connector for electrically connected to the first connector, the second connector including a plurality of contacts in compliance with a connector specification, the contacts including:
• first and third contacts for conducting signals of differential pair 1 transmitter for PCI Express channel A;
• a second contact for conducting a PCI base board present signal;
• a fourth contact for conducting a PCI bus reset signal;
• fifth, 11th, 17th, 23rd, 29th, 30th, 35th, 36th contacts for grounding;
• a sixth contact for conducting a system power normal signal;
• seventh and ninth contacts for conducting signals of differential pair 3 receiver for PCI Express channel A;
• an eighth contact for conducting a system management bus clock signal;
• a tenth contact for conducting a system management bus data signal;
• a twelfth contact for conducting a system 12V power signal;
• 13th and 15th contacts for conducting signals of differential pair 3 transmitter for PCI Express channel A;
• a 14th contact for conducting a system 5V power signal;
• 16th, 18th, 20th, and 22nd contacts for conducting system 3.3V power signals;
• 19th and 21th contacts for conducting signals of differential pair 2 transmitter for PCI Express channel A;
• a 24th contact for conducting a standby 3.3V power signal;
• 25th and 27th contacts for conducting signals of differential pair 0 transmitter for PCI Express channel A;
• 26th and 28th contacts for conducting system 1.5V power signals;
• 31st and 33rd contacts for conducting signals of differential pair 0 receiver for PCI Express channel A;
• 32nd and 34th contacts for conducting signals of differential pair 2 transmitter for PCI Express channel A;
• 37th and 39th contacts for conducting signals of differential pair 1 receiver for PCI Express channel A;
• and
• 38th and 40th contacts for conducting clock differential pair receiving signals for PCI Express channel A.