Hierarchical packet scheduler using hole-filling and multiple packet buffering
AssigneeIntel Corporation
InventorsAlok Kumar, Michael Kounavis, Raj Yavatkar
Life of this patent
Estimating the term…
Abstract
A hierarchical packet scheduler using hole-filling and multiple packet buffering. Packet references are enqueued into a hierarchical packet scheduler, wherein the hierarchical packet scheduler includes one or more levels, each level including one or more schedulers being served by one or more threads, wherein the number of threads serving a particular level is not dependent on the number of schedulers on the particular level. Packet references are dequeued from the hierarchical packet scheduler at a root level scheduler of the one or more schedulers.
Claims41
A method, comprising:
- enqueing packet references into a hierarchical packet scheduler, wherein the hierarchical packet scheduler includes one or more levels, each level including one or more schedulers being served by one or more threads, wherein the number of threads serving a particular level is not dependent on the number of schedulers on the particular level;
- and
- dequeuing packet references from the hierarchical packet scheduler at a root level scheduler of the one or more schedulers.
An article of manufacture comprising:
- a machine-accessible medium including a plurality of instructions which when executed perform operations comprising:
- enqueing packet references into a hierarchical packet scheduler, wherein the hierarchical packet scheduler includes one or more levels, each level including one or more schedulers being served by one or more threads, wherein the number of threads serving a particular level is not dependent on the number of schedulers on the particular level;
- and
- dequeuing packet references from the hierarchical packet scheduler at a root level scheduler of the one or more schedulers.
A system, comprising:
- at least one network processor;
- and
- a storage device communicatively coupled to the at least one network processor, the storage device having stored a plurality of instructions which when executed by the at least one network processor perform operations comprising:
- enqueing packet references into a hierarchical packet scheduler, wherein the hierarchical packet scheduler includes one or more levels, each level including one or more schedulers being served by one or more threads, wherein the number of threads serving a particular level is not dependent on the number of schedulers on the particular level;
- and
- dequeuing packet references from the hierarchical packet scheduler at a root level scheduler of the one or more schedulers.
Dependencies are inferred from the claim text.