Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorHyun-Cheol Lee
Life of this patent
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Abstract
The present invention is related to a semiconductor memory device improving refresh performance by reliably generating an internal voltage. The internal voltage generator for use in the semiconductor memory device includes a cell plate voltage generator, a driving voltage generator, and a bit line precharge voltage generator. The bit line precharge voltage generator includes a half driving voltage generator for receiving the driving voltage to thereby generate the bit line precharge voltage, a second reference voltage generator for generating the second reference voltage, and a bit line precharge voltage releasing device for discharging a surplus voltage.
Claims10
An internal voltage generator for use in a semiconductor memory device, comprising:
- a cell plate voltage generating means for receiving an external power supply voltage to thereby generate a cell plate voltage supplied to unit cells;
- a driving voltage generating means for receiving an external power supply voltage to thereby output a driving voltage having a first reference voltage level;
- and
- a bit line precharge voltage generating means for receiving the driving voltage to thereby output the bit line precharge voltage having the second reference voltage level,
- wherein the bit line precharge voltage generating means includes:
- a half driving voltage generating means for receiving the driving voltage to thereby generate the bit line precharge voltage;
- a second reference voltage generating means for generating the second reference voltage;
- and
- a bit line precharge voltage releasing means for discharging a surplus voltage.
An internal voltage generator for use in a semiconductor memory device, comprising:
- a driving voltage generating means for receiving an external power supply voltage to thereby output a driving voltage having a first reference voltage level;
- and
- a bit line precharge voltage generating means for receiving the driving voltage to thereby output the bit line precharge voltage having the second reference voltage level,
- wherein the bit line precharge voltage generating means includes:
- a half driving voltage generating means for receiving the driving voltage to thereby generate the bit line precharge voltage;
- a second reference voltage generating means for generating the second reference voltage;
- and
- a bit line precharge voltage releasing means for discharging a surplus voltage.
Dependencies are inferred from the claim text.