Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorChang-Ho Do
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Abstract
The present invention is related to an internal voltage generator for use in a semiconductor memory device preventing latch-up and chip damage. The internal voltage generator includes a first pumping block for comparing an internal upper voltage with a reference voltage to generate a first compensated upper voltage based on a comparison result, an initial level sensor for comparing the internal upper voltage with an operating voltage to thereby generate a first enable signal, a second pumping block for generating a second compensated upper voltage in response to an active command, the first enable signal, and the comparison result of the first pumping block, and an initializing block for providing the internal voltage during an initial operation of the semiconductor memory device.
Claims15
An internal voltage generator for use in a semiconductor memory device, comprising:
- a first pumping block for comparing an internal upper voltage with a reference voltage to generate a first compensated upper voltage based on a comparison result;
- an initial level sensing means for comparing the internal upper voltage with an operating voltage to thereby generate a first enable signal;
- a second pumping block for generating a second compensated upper voltage in response to an active command, the first enable signal, and the comparison result of the first pumping block;
- and
- an initializing means for providing the internal upper voltage during an initial operation of the semiconductor memory device.
Dependencies are inferred from the claim text.