Storage apparatus

A storage apparatus having a controller receiving a data input/output request from other apparatus and performing a data input/output processing to a storage volume on a storage unit, the storage apparatus comprising:

• said controller controls data controlling a data transfer between said other apparatus and the controller to perform the data input/output processing, and including a first processor for controlling said data input/output processing, a data transfer controller for controlling said data transfer based on an instruction of said first processor, a cache memory to be a transfer destination or transfer source in said data transfer, a first memory storing data transfer information for controlling said data transfer written by said first processor, and a third memory used by said data transfer controller,
• wherein said data transfer controller includes a data transfer circuit for controlling a DMA data transfer and a communication interface unit provided with a communication interface with said other apparatus and performing a communication processing,
• said communication interface unit includes a second processor for controlling communication with said other apparatus, and a second memory for storing data transferred between said other apparatus and the communication interface unit,
• said transfer circuit includes a plurality of DMA units each having a DMA controller, a register for storing said data transfer information, and a buffer for storing data to be transferred,
• in controlling said data transfer, said DMA unit executes the data transfer between said cache memory and said second memory by using an operation of saving, to said third memory, data transfer information stored in said register and data stored in said buffer and an operation of recovering the data transfer information and the data saved in said third memory to said register and said buffer, in accordance with the data transfer information read from said first memory, and
• said data transfer controller uses said plurality of DMA units to concurrently process one or more data transfer, uses said saving or recovering operation even in one DMA unit to process said data transfer while the data transfers are switched, multiprocesses the plurality of data transfers, and executes control for saving in advance, into said third memory, the data transfer information stored in said register and the data stored in said buffer by one or more DMA unit not processed during said data transfer.

A storage apparatus including a storage system having a first storage apparatus provided with a first controller for receiving a data input/output request from an information processor and performing a data input/output processing to a first storage volume on a storage unit, and a second storage apparatus provided with a second controller communicably connected to said first controller and executing a data input/output processing to a second storage volume on the storage unit, the storage apparatus comprising:

• said first controller controlling a data transfer between said information processor or second controller that is other apparatus and the first controller to perform the data input/output processing to said first or second storage volume and includes:
• an input/output controller for controlling said data input/output processing;
• a data transfer controller for controlling said data transfer based on an instruction of said input/output controller;
• a first memory unit to be a transfer destination or a transfer source in said data transfer;
• and
• a second memory unit storing data transfer information for controlling said data transfer,
• wherein said data transfer controller includes:
• a data transfer circuit for controlling a DMA data transfer;
• and
• a communication interface unit provided with a communication interface with said other apparatus and performing a communication processing, and
• wherein said data transfer circuit includes a plurality of DMA units each having a DMA controller, a register for storing said data transfer information, and a buffer for storing data to be transferred, makes said register of said DMA unit and said buffer perform a processing of saving, into said second memory unit, data transfer information stored in said register of said DMA unit and data stored in said buffer and a processing of recovering the data transfer information and the data saved in said second memory unit, concurrently processes one or more data transfer by using said plurality of DMA units, processes said data transfers by using said saving and recovering operations in one of said DMA units while said data transfers are shifted, multiprocesses a plurality of data transfers, and executes control for-saving in advance, into said second memory unit, the data transfer information stored in said register and the data stored in said buffer by using the DMA unit not processing said data transfers.