Non volatile semiconductor memory device
AssigneeRenesas Technology Corp.
InventorsTakanori Yamazoe, Shin Ito, Yoshiki Kawajiri
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AssigneeRenesas Technology Corp.
InventorsTakanori Yamazoe, Shin Ito, Yoshiki Kawajiri
Estimating the term…
In a nonvolatile semiconductor memory device, the increase of the capacity of a nonvolatile semiconductor memory inevitably causes the power supply circuits including the charge pump circuits at the periphery to increase. In view of the above situation, the object of the present invention is to provide a technology of allowing a nonvolatile semiconductor memory to increase the capacity without increasing the power supply circuits which are the peripheral circuits of the nonvolatile semiconductor memory. It is possible to carry out the erase and write of plural memory cell blocks by selecting memory cell blocks one by one in a power supply circuit containing a charge pump circuit having the capability of carrying out the erase and write of a memory cell block and it is also possible, at the time of read and standby, to increase the charge pump capability and select plural memory cell blocks by inputting clock signals having a frequency not less than the frequency of the clock signals at the time of the operations of erase and write to charge pumps.
A nonvolatile semiconductor memory device comprising:
A nonvolatile semiconductor memory device comprising said clock generation circuit wherein said clock generation circuit changes the frequency of the signal generated by said clock generation circuit in accordance with the operation state of said memory cell array and said high voltage selection circuit wherein said high voltage selection circuit changes the reference voltage to detect said prescribed high voltage in accordance with the operation state of said memory cell array, wherein the output of said clock generation circuit is turned on or off in accordance with the output of said high voltage selection circuit.
A nonvolatile semiconductor memory device:
An IC card having a nonvolatile semiconductor memory device comprising a memory cell array comprising plural nonvolatile memory cell blocks;
Dependencies are inferred from the claim text.