NAND flash memory device capable of changing a block size

A NAND flash memory device comprising:

• a plurality of memory blocks, each memory block of which being divided into first and second page groups;
• first and second switching circuits connected between the first and second page groups and a global line to transfer operating voltages to the first and second page groups, respectively;
• a block division selector to output a division signal to determine whether to activate one or both of the first and second page groups;
• a page group selection controller to output first and second selection signals at a same level or at different levels in response to a page selection address signal and an erasing signal;
• and
• first and second block switching circuits to control the first and second switching circuits in response to the first and second selection signals, respectively, and a block selection address signal,
• wherein, in accordance with the division signal, all memory cells included in each memory block are erased, or memory cells included in the first or second page group are independently erased.