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AssigneeSpansion LLC
InventorsColin Bill, Swaroop Kaza, Tzu-Ning Fang, Stuart Spitzer
Estimating the term…
A memory array includes first and second sets of conductors and a plurality of memory-diodes, each connecting in a forward direction a conductor of the first set with a conductor of the second set. An electrical potential is applied across a selected memory-diode, from higher to lower potential in the forward direction, intended to program the selected memory-diode. During this intended programming, each other memory-diode in the array has provided thereacross in the forward direction thereof an electrical potential lower than its threshold voltage. The threshold voltage of each memory-diode can be established by applying an electrical potential across that memory-diode from higher to lower potential in the reverse direction. By so establishing a sufficient threshold voltage, and by selecting appropriate electrical potentials applied to conductors of the array, problems related to current leakage and disturb are avoided.
A method of providing a state of a memory-diode comprising:
A method of establishing a threshold voltage of a conductive memory-diode, comprising applying an electrical potential across the memory-diode, from higher to lower electrical potential in the reverse direction of the memory-diode.
A method of undertaking a procedure on a memory-diode comprising:
A method of undertaking a procedure on a memory-diode which is in a conductive state, comprising:
A method of undertaking a procedure on a selected memory-diode of a memory array, said memory array comprising a first plurality of conductors, a second plurality of conductors, and a plurality of memory-diodes, each connecting a conductor of the first plurality thereof with a conductor of the second plurality thereof, comprising;
A method of erasing a selected programmed memory-diode of a memory array, said memory array comprising a first plurality of conductors, a second plurality of conductors crossing the first plurality of conductors, and a plurality of memory-diodes, each connecting a conductor of the first plurality thereof with a conductor of the second plurality thereof adjacent the intersection of those conductors, comprising;
A method of undertaking a procedure on a selected memory-diode of a memory array, said memory array comprising a first plurality of parallel conductors, a second plurality of parallel conductors orthogonal to and crossing the first plurality of conductors, and a plurality of memory-diodes, each connecting a conductor of the first plurality thereof with a conductor of the second plurality thereof adjacent the intersection of those conductors, comprising;
Dependencies are inferred from the claim text.