Pre-written volatile memory cell
AssigneeSTMicroelectronics S.r.l.
InventorsPhilippe Candelier, Jean Lasseuguette, Richard Fournel
Life of this patent
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Abstract
A memory cell of the SRAM type Is provided that is capable of storing one datum in a non-volatile manner. The memory cell includes two inverters (20 and 21) configured as a flip-flop for storing one bit. Each inverter includes a transistor (24 or 26) of a first type and a transistor (25 or 27) of a second type. The concentration of carriers in the conduction channel of the transistor (24) of the first type of one of the inverters (20) is different from the concentration of carriers in the conduction channel of the transistor (26) of the first type of the other inverter (21) so that the inverters have different threshold voltages.
Claims12
A memory cell comprising:
- two inverters configured as a flip-flop for storing one bit, each of the two inverters comprising a transistor of a first type and a transistor of a second type, characterized in that a concentration of carriers in a conduction channel of the transistor of the first type of a first of the two inverters is different from a concentration of carriers in a conduction channel of the transistor of the first type of a second of the inverters so that the inverters have different threshold voltages, wherein at least one of the transistors of the first type has a different channel surface area from a channel surface area of at least one transistor of the second type.
An integrated circuit comprising:
- a plurality of memory cells, with at least one of the memory cells including two inverters configured as a flip-flop for storing one bit, each of the two inverters comprising a transistor of a first type and a transistor of a second type, characterized in that a concentration of carriers in a conduction channel of the transistor of the first type of a first of the two inverters is different from a concentration of carriers in a conduction channel of the transistor of the first type of a second of the two inverters so that the inverters have different threshold voltages;
- and
- a circuit capable of delivering a progressive power supply voltage for the cells at power-up;
- wherein at least one of the transistors of the first type has a different channel surface area from a channel surface area of at least one transistor of the second type.
An electronic memory circuit fabricated on a semiconductor chip, the circuit comprising:
- a plurality of elementary storage cells, each elementary cell being able to store one bit by means of two inverters configured as a flip-flop, and further comprising at least one asymmetric storage cell having two inverters configured as a flip-flop, wherein each of the two inverters comprise a transistor of a first type and a transistor of a second type, a concentration of carriers in a conduction channel of the transistor of the first type of a first of the two inverters being different from a concentration of carriers in a conduction channel of the transistor of the first type of a second of the two inverters so that the inverters have different threshold voltages, wherein at least one of the transistors of the first type has a different channel surface area from a channel surface area of at least one transistor of the second type.
Dependencies are inferred from the claim text.