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AssigneeInfineon Technologies AG
InventorsUlrike Gruning Von Schwerin, Thomas Happ, Cay-Uwe Pinnow, Thomas Rohr
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A memory cell field with an integrated arrangement of solid body electrolyte memory cells, and in particular of CBRAM solid body electrolyte memory cells with 1T1R architecture, wherein the solid body electrolyte memory cells each comprise a layer stack that comprises at least a bottom and a top electroconductive, in particular metal layer and a layer of solid body electrolyte material or ion conductor material, respectively, positioned therebetween, and wherein each solid body electrolyte memory cell can be controlled via a word line, a bit line, and a plate line by means of a selection transistor, wherein at least a number of solid body electrolyte memory cells in the memory cell field have a common plate electrode or are connected to a common plate line, respectively.
A memory cell field with an integrated arrangement of solid body electrolyte memory cells, and in particular of CBRAM solid body electrolyte memory cells with 1T1R architecture, wherein the solid body electrolyte memory cells each comprise a layer stack (CC, R, PL) that comprises at least a bottom (CC) and a top electroconductive, in particular metal layer (PL) and a layer (R) of solid body electrolyte material or ion conductor material, respectively, positioned therebetween, and wherein each solid body electrolyte memory cell can be controlled via a word line (WL), a bit line (BL), and a plate line (PL) by means of a selection transistor (T),
A method for manufacturing at least one memory cell field with an integrated arrangement of solid body electrolyte memory cells, and in particular of CBRAM solid body electrolyte memory cells, for generating a memory array with 1T1R architecture, wherein the method comprises at least the following steps:
Dependencies are inferred from the claim text.