Nonvolatile ferroelectric memory device and control method thereof
AssigneeHynix Semiconductor Inc.
InventorsHee Kang, Jin Ahn
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Abstract
A nonvolatile ferroelectric memory device and a control method thereof are provided to control read/write operations of memory cell arrays whose channel resistance is differentiated depending on a polarity state of a ferroelectric material. In the device, data read from a memory cell are sensed and amplified through a sense amplifier, and the amplified data are stored in a register. Then, high data are written in all activated cells. Thereafter, new data applied from a data bus unit to a selected memory cell are written in response to an output signal from a column decoder, and data stored in the register are written-back in an unselected memory cell.
Claims45
A nonvolatile ferroelectric memory device comprising:
- a memory cell array comprises a plurality of unit cell arrays arranged in row and column directions each including a plurality of serially connected unit memory cells whose switching operations are selectively dependent upon a voltage applied to a selected one of a plurality of word lines and a selected one of a plurality of bottom word lines;
- a sense amplifier unit adapted and configured to sense and amplify data applied from the memory cell array to store the amplified data;
- a column decoding unit adapted and configured to decode a column selecting signal for selecting a memory cell;
- and
- a column switching unit whose switching operation is controlled in response to an output signal from the column decoding unit, and adapted and configured to selectively connect a data bus to the sense amplifier unit, wherein each of the plurality of unit memory cells comprises a ferroelectric layer and is adapted and configured to read and write data by inducing different channel resistance to a channel region dependent upon a polarity state of the ferroelectric layer.
A method for controlling a nonvolatile ferroelectric memory device, the method comprising:
- sensing data stored in a memory cell by inducing different channel resistance to a floating channel layer depending on a polarity state of a ferroelectric layer;
- amplifying data of all activated memory cells through a sense amplifier to store the amplified data in a register;
- storing hidden data in the activated memory cells;
- and
- writing input data applied through a data bus in a selected memory cell depending on activation of a column selecting signal, and writing-back data stored in the register into an unselected memory cell.
Dependencies are inferred from the claim text.