Nonvolatile ferroelectric memory device
AssigneeHynix Semiconductor Inc.
InventorsHee Kang, Jin Ahn
Life of this patent
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Abstract
A nonvolatile ferroelectric memory device features a multi-bit serial cell structure where read bit lines and write bit lines are divided to control read/write paths individually, thereby improving a transmission operation of serial data. In the nonvolatile ferroelectric memory device, a serial cell that comprises a plurality of switching devices and a plurality of ferroelectric capacitors is connected serially between a write switching device and a read switching device. The serial cell stores cell data applied from the write bit line sequentially in the plurality of ferroelectric capacitors at a write mode, and outputs the cell data stored in a plurality of ferroelectric capacitors to the read bit line at a read mode.
Claims20
A nonvolatile ferroelectric memory device comprising:
- a serial cell comprising a plurality of ferroelectric capacitors connected in parallel to a plurality of serially connected switching elements whose switching operations are selectively controlled depending on states of a plurality of word lines;
- a write switching element for outputting cell data applied from a write bit line to the serial cell when a write enable control signal is activated;
- and
- a read switching element for outputting the cell data stored in the serial cell to a read bit line when a read enable control signal is activated.
A nonvolatile ferroelectric memory device comprising:
- a plurality of multi-bit serial cells connected in serial between a pair of a plurality of read bit lines and a plurality of write bit lines which are arranged in row and column directions;
- a plurality of read switching elements for selectively controlling connection of the plurality of read bit lines and the plurality of multi-bit serial cells;
- a plurality of write switching elements for selectively controlling connection of the plurality of write bit lines and the plurality of multi-bit serial cells;
- a plurality of sense amplifiers connected one by one to the plurality of read bit lines;
- a read control unit, connected one by one to the plurality of sense amplifiers, for controlling sensing operations of the plurality of sense amplifiers at a read mode;
- a plurality of registers for storing cell data sensed from the plurality of sense amplifiers;
- and
- a write control unit, connected one by one to the plurality of write bit lines, for outputting the cell data stored in the plurality of registers to the plurality of write bit lines at a write mode,
- wherein each of the plurality of multi-bit serial cells comprises:
- a plurality of switching elements whose switching operations are selectively controlled depending on states of a plurality of word lines;
- and a plurality of ferroelectric capacitors, connected in parallel to the plurality of switching elements, for storing the cell data.
A nonvolatile ferroelectric memory device comprising:
- a plurality of sub bit lines connected to a read bit line;
- a plurality of serial cells connected serially between the plurality of sub bit lines and a write bit line;
- a global sense amplifier, connected to one by one to the read bit line, for sensing and amplifying cell data applied to the read bit line;
- a plurality of sub sense amplifiers, connected one by one to the plurality of sub bit lines, for sensing cell data applied to the plurality of sub bit lines to output the cell data to the global sense amplifier;
- a register, connected between the global sense amplifier and the write bit line, for storing the cell data applied from the global sense amplifier;
- a plurality of write switching elements for outputting the cell data applied from the write bit line to the serial cell when a write enable control signal is activated;
- and
- a plurality of read switching elements for outputting the cell data stored in the plurality of serial cells to the plurality of sub bit lines when a read enable control signal is activated,
- wherein each of the plurality of serial cells comprises:
- a plurality of switching elements whose switching operations are selectively controlled depending on states of a plurality of word lines;
- and a plurality of ferroelectric capacitors, connected in parallel to the plurality of switching elements, for storing the cell data.
Dependencies are inferred from the claim text.