Non-volatile and-type content addressable memory
AssigneeSTMicroelectronics S.r.I.
InventorGuido de Sandre
Life of this patent
Estimating the term…
Abstract
In order to speed up the search for a data item in a content addressable memory and to simplify the circuit structure of the memory having associated with each row of cells a ground control line, a ground line, a match control line, and with every row of cells there is associated a search activation terminal and a match indication terminal; a method of controlling the storage and retrieval of data in the memory utilizing a unique comparison strategy for determining when the content of a comparison register is found in the memory.
Claims21
A method of carrying out the search for a binary word stored in a content addressable memory comprising the following operations:
- associating an element of a comparison register with each column of the matrix;
- inserting in the register a word that is to be searched;
- comparing the content of the register bit by bit with the content of memory cells in every row by carrying out the following operations for each row:
- applying a first pre-determined voltage to a ground line;
- applying a second pre-determined voltage to a word line;
- applying to a ground control line a third pre-determined voltage sufficient to close a first electronic switch and to discharge a match node of the cells of the row and immediately afterwards applying the first pre-determined voltage to the ground control line;
- applying to the match control line a fourth pre-determined voltage sufficient to close a second electronic switch and to discharge output terminals of the cells of the row and immediately afterwards applying the first pre-determined voltage to the match control line;
- applying a fifth pre-determined voltage to a search activation terminal;
- subsequently biasing first and second bit lines of every column by applying a pre-determined search voltage to the first or the second bit line according to whether the respective bit of the comparison register is in a first or a second logic state;
- monitoring the voltage of a match indication terminal;
- and
- generating a match signal whenever the voltage on the match indication terminal varies or a no-match signal when the voltage on the match indication terminal does not vary.
A method of searching for a binary word stored in a content addressable memory having a plurality of memory cells ordered into a matrix of rows and columns, and having an input terminal, an output terminal, first and second bit lines associated with every column of cells, and a word line, a ground control line, a ground line, a match control line, a search activation terminal, and a match indication terminal associated with every row of cells, the method comprising:
- coupling an element of a comparison register with each column of the matrix of memory cells;
- storing in the comparison register a word to be searched;
- comparing the content of the comparison register bit by bit with the content of every row of memory cells in the matrix of memory cells by carrying out the following operations for each row:
- applying a first pre-determined voltage to the ground line;
- applying a second pre-determined voltage to the word line;
- applying a third pre-determined voltage to the ground control line, the third pre-determined voltage set at a level to close an electronic switch and to discharge a match node of the cells of the row and immediately afterward applying the first pre-determined voltage to the ground control line;
- applying to the match control line a fourth pre-determined voltage sufficient to close a first electronic switch and to discharge the output terminals of the cells of the row and immediately afterward applying the first pre-determined voltage to the same match control line;
- applying a fifth pre-determined voltage to the search activation terminal;
- subsequently biasing the bit lines of every column by applying a pre-determined search voltage to the first or the second bit line according to whether the respective bit of the comparison register is in a first or a second logic state;
- monitoring the voltage of the match indication terminal;
- and
- generating a match signal when a voltage on the match indication terminal varies and generating a no-match signal when a voltage on the match indication terminal does not vary.
A method of searching for a binary word stored in a content addressable memory having a plurality of memory cells ordered into a matrix of rows and columns, and having an input terminal, an output terminal, first and second bit lines associated with every column of cells, and a word line, a ground control line, a ground line, a match control line, a search activation terminal, and a match indication terminal associated with every row of cells, the method comprising:
- canceling the content of the memory cells;
- applying a high voltage to the word line;
- setting a ground control line to a high voltage and a ground line to a ground potential;
- to store a logic 1, applying an intermediate voltage to a first bit line and no voltage to a second bit line;
- for storing a logic 0, applying an intermediate voltage to the second bit line and no voltage to the first bit line;
- and
- for a don't care condition, applying a low voltage to both the first and second bit lines.
Dependencies are inferred from the claim text.