Multilayered chip capacitor and printed circuit board having embedded multilayered chip capacitor

A printed circuit board having an embedded multilayered chip capacitor, comprising:

• a multilayered printed circuit board, which includes a plurality of layers and a plurality of conductive lines thereon;
• and
• a multilayered chip capacitor, which includes a capacitor body formed by stacking a plurality of dielectric layers and provides opposite first and second surfaces formed in a stacking direction of the plurality of dielectric layers as top and bottom surfaces, and first and second external electrodes formed on the top and bottom surfaces, respectively, of the capacitor body, and which is embedded in the multilayered printed circuit board to electrically connect the first and second external electrodes of the multilayered chip capacitor to predetermined conductive lines of the printed circuit board,
• wherein the multilayered chip capacitor includes at least one pair of first and second internal electrodes which is formed on the plurality of dielectric layers to be spaced apart from the top and bottom surfaces of the capacitor body and is alternately arranged on the plurality of dielectric layers so that one electrode of one pair of internal electrodes faces the other electrode of the one pair of internal electrodes with one of the plurality of dielectric layers interposed therebetween, a plurality of first leads protruding from the first internal electrodes so that the first internal electrodes are connected to the first external electrodes, and a plurality of second leads protruding from the second internal electrodes so that the second internal electrodes are connected to the second external electrodes.