Logical calculation circuit, logical calculation device, and logical calculation method

A logical calculation circuit comprising:

• a non-volatile memory element for retaining non-volatile state corresponding to a first data to be calculated s as a binary data, and having first and second terminals;
• a non-volatile load element for retaining non-volatile state corresponding to the inverted data /s of the first data to be calculated s, and having a third terminal connected to the first terminal of the non-volatile memory element, and a fourth terminal;
• and
• a calculation result output section for outputting a logical calculation result of the first and a second data to be calculated s and x, as a calculation result data z as a binary data, for a specified logical operator corresponding to a reference potential arbitrarily chosen out of two complementary reference potentials, according to the states of the non-volatile memory element and the non-volatile load element obtained by pre-charging the coupling node of the first terminal of the non-volatile memory element and the third terminal of the non-volatile load element with the reference potential and then giving the second data x as a binary data, to the second terminal of the non-volatile memory element while maintaining the fourth terminal of the non-volatile load element at the reference potential, wherein
• the calculation result data z substantially meets the following equation when the binary data corresponding to the two complementary reference potentials are assumed to be c and /c,
• z=/c AND x AND /s OR c AND (x OR /s).

A logical calculation circuit comprising:

• a non-volatile memory element for retaining non-volatile state corresponding to a first data to be calculated,
• a non-volatile load element for retaining non-volatile state of different rate of change depending on the first data to be calculated, connected to the non-volatile memory element at a coupling node;
• and
• a calculation result output section for outputting a logical calculation result of the first and second data to be calculated for a specified logical operator according to the state change amounts, of both the non-volatile memory element and the non-volatile load element, obtained by giving a second data to be calculated to the non-volatile memory element.