# US 2006/0139197 A1 · Method and apparatus for an image canceling digital-to-analog converter (DAC)

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- Number: US 2006/0139197 A1
- Document ID: US20060139197A1
- Status: Published application
- Kind: A1
- Application number: 11/356,768
- Filed: 2006-02-17
- Published: 2006-06-29
- Earliest claimed: 2004-04-12
- Assignees: Broadcom Corporation
- Inventors: Brian Schoner
- Web page: https://patentgrep.com/patent/US20060139197A1

## CPC

- H03M 3/368: {of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators}
- H03M 3/50: {Digital/analogue converters using delta-sigma modulation as an intermediate step (digital delta-sigma modulators per se H03M7/3004)}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A method and apparatus for an image canceling digital-to-analog converter is disclosed. Up-sampling and noise shaping is used to produce a stream of digital sample values at a relatively higher sampling rate than the sampling rate of the digitized input samples, each higher sampling rate sample having fewer bits than the original samples. The higher sampling rate stream is then distributed for sequential conversion by multiple digital-to-analog converters each operating at a lower sampling rate. The outputs of the converters are then combined to form a combined output signal. Most spectral images normally observed in a standard or conventional DAC are attenuated in the combined output signal of an embodiment in accordance with the present invention. Any spectral images that remain are further from the signal of interest, permitting the use of lower cost filtering.

## Claims

### Claim 1

An image canceling digital-to-analog converter (DAC) comprising:
a noise shaping circuit;
a plurality of digital-to-analog converters;
a combining circuit for producing a combined output from the plurality of digital to analog converters; and
wherein the noise shaping circuit modifies selected samples of an upsampled digital signal sample stream before periodic distribution of successive samples to a respective one of the plurality of digital to analog converters in a cyclic fashion at essentially equally spaced points in time.

### Claim 2 (depends on 1)

The image canceling digital-to-analog converter of claim 1, further comprising an upsampling circuit producing upsampled digital signal samples from a received stream of digital signal samples.

### Claim 3 (depends on 1)

The image canceling digital-to-analog converter of claim 1, wherein each sample distributed to one of the plurality of digital-to-analog converters comprises fewer bits than each upsampled digital signal sample.

### Claim 4 (depends on 1)

The image canceling digital-to-analog converter of claim 1, further comprising a clock circuit producing a plurality of clock signals each initiating conversion by a corresponding one of the plurality of digital-to-analog converters.

### Claim 5

A method of operating an image cancelling digital to analog converter, the method comprising:
upsampling each sample of a first stream of digital signal samples to produce N samples of a second stream of digital signal samples;
modifying samples of the second stream;
sequentially converting successive samples of the modified second stream in a cycle of N conversions at essentially equally spaced points in time, to form N analog signals; and
combining the N analog signals to produce an output signal.

### Claim 6 (depends on 5)

The method of claim 5, wherein the modifying comprises filtering the samples of the second stream using a moving average filter having N taps.

### Claim 7 (depends on 5)

The method of claim 5, wherein each converted sample has K fewer bits than each sample of the first stream of digital signal samples, and wherein N=2K.

### Claim 8 (depends on 5)

The method of claim 5, wherein N is greater than or equal to 2.

### Claim 9

A machine-readable storage, having stored thereon a computer program having a plurality of code sections for operating an image cancelling digital to analog converter, the code sections executable by a machine for causing the machine to perform the operations comprising:
upsampling each sample of a first stream of digital signal samples to produce a number N samples of a second stream of digital signal samples;
modifying samples of the second stream;
sequentially converting successive samples of the modified second stream in a cycle of N conversions at essentially equally spaced points in time, to form N analog signals; and
combining the N analog signals to produce an output signal.

### Claim 10 (depends on 9)

The machine-readable storage of claim 9, wherein the modifying comprises filtering the samples of the second stream using a moving average filter having N taps.

### Claim 11 (depends on 9)

The machine readable storage of claim 9, wherein each converted sample has K fewer bits than each sample of the first stream of digital signal samples, and wherein N=2K.

### Claim 12 (depends on 9)

The machine readable storage of claim 9, wherein N is greater than or equal to 2.

### Claim 13

A method of operating an image canceling digital-to-analog converter circuit for converting a first digital sample stream representative of a first signal, the method comprising:
processing each sample of the first digital sample stream to produce a second digital sample stream;
converting a plurality of successive samples of the second stream at essentially equally-spaced points in time to produce a corresponding plurality of analog signals; and
combining the plurality of analog signals to produce a combined output signal representative of the first digital sample stream.

### Claim 14 (depends on 13)

The method of claim 13, wherein a sample of the first stream comprises a greater number of bits than a sample of the second stream.

### Claim 15 (depends on 13)

The method of claim 13, wherein the second stream comprises a relatively larger number of samples per unit time and the first stream comprises a relatively smaller number of samples per unit time.

### Claim 16 (depends on 13)

The method of claim 13, wherein the processing comprises:
upsampling the first digital sample stream; and
filtering the upsampled first sample stream.

### Claim 17

A system supporting digital-to-analog conversion of a stream of digital signal samples to an analog output signal, the system providing cancellation of spectral images in the analog output signal, the system comprising:
digital signal processing circuitry for upsampling the stream of digital signal samples, and for modifying the upsampled stream to form a plurality of streams of modified digital signal samples;
a clock circuit for producing clocking signals that periodically enable digital-to-analog conversion, essentially equally spaced in time, of sequential samples from each of the plurality of streams of modified digital signal samples; and
wherein the digital-to-analog conversions of samples of a stream of modified digital signal samples produce a corresponding one of a plurality of analog signals for combining to form the analog output signal.

### Claim 18 (depends on 17)

The system of claim 17, further comprising:
a plurality of digital-to-analog converters, each for converting a sequence of samples from a corresponding one of the plurality of streams of modified digital signal samples to an analog signal, based upon the clocking signals.

### Claim 19 (depends on 17)

The system of claim 17, further comprising:
combiner circuitry for producing the analog output signal from the plurality of analog signals.

### Claim 20 (depends on 19)

The system of claim 19, wherein the combiner sums the plurality of analog signals.

### Claim 21 (depends on 17)

The system of claim 17, wherein the modification of the upsampled stream comprises reducing a number of bits in samples of the upsampled stream.

### Claim 22 (depends on 17)

The system of claim 17, wherein the modification of the upsampled stream comprises applying a filter to the upsampled stream of digital signal samples.

### Claim 23

An image canceling digital-to-analog converter (DAC) comprising:
a plurality of digital-to-analog converters that receive a stream of samples at a first sampling rate, and operate at a second sampling rate lower than the first sampling rate; and
a combiner for producing a combined output from the plurality of digital to analog converters.

### Claim 24 (depends on 23)

The image canceling digital-to-analog converter (DAC) of claim 23, wherein the combiner produces the combined output from the plurality of digital to analog converters such that the combined output appears as if a single conversion of the stream of samples occurred at the first sampling rate.

### Claim 25 (depends on 23)

The image canceling digital-to-analog converter (DAC) of claim 23, wherein the combined output is substantially devoid of spectral images.

### Claim 26

An image canceling digital-to-analog converter (DAC) comprising:
an upsampler that receives a first stream of samples at a first sampling rate, and that produces a second stream of samples at a higher sampling rate than the first stream of samples, and wherein samples of the second stream have fewer bits than samples of the first stream of samples;
a noise shaper for modifying samples of the second stream of samples;
a plurality of digital-to-analog converters, each converter operating at the sampling rate of the first stream of samples; and
a combiner for producing a combined output from the plurality of digital-to-analog converters.

### Claim 27

An image canceling digital-to-analog converter (DAC) comprising:
signal processing circuitry that receives, at a first sampling rate, a first stream of samples representative of an analog signal, and that produces, at a sampling rate higher than the first sampling rate, a second stream of samples;
a plurality of digital-to-analog converters that receive the second stream of samples, each digital-to-analog converter operating at the first sampling rate; and
a combiner for producing a combined output from the plurality of digital-to-analog converters.

### Claim 28 (depends on 27)

The image canceling digital-to-analog converter of claim 27, wherein the combined output is substantially devoid of spectral images.

### Claim 29 (depends on 27)

The image canceling digital-to-analog converter of claim 27, wherein the combined output is substantially devoid of spectral images below a frequency corresponding to about the second sampling rate.

### Claim 30 (depends on 27)

The image canceling digital-to-analog converter of claim 27, wherein each of the plurality of digital-to-analog converters has fewer bits of resolution than each sample of the first stream of samples.

### Claim 31 (depends on 27)

The image canceling digital-to-analog converter of claim 27, wherein the signal processing circuitry comprises:
an upsampler that receives the first stream of samples and produces a second stream of samples at the second sampling rate, each sample of the second stream of samples having fewer bits than a sample of the first stream of samples; and
a noise shaper that modifies samples of the second stream of samples.
