Back to results
US 2006/0139195 A1Published application
Cyclic digital to analog converter
AssigneeIntel Corporation
InventorsBryan Casper, Craig Petrie
Life of this patent
Estimating the term…
Abstract
A digital to analog converter (DAC) circuit operates least significant bit (LSB) first.
Claims20
A digital to analog converter comprising:
- an amplifier;
- a first capacitor coupled to an input node of the amplifier;
- a second capacitor coupled between the input node of the amplifier and an output node of the amplifier, wherein the second capacitor has a capacitance value substantially twice a capacitance value of the first capacitor;
- and
- at least one switching element coupled to the first capacitor, wherein the switching element is coupled to be responsive to a least-significant-bit first sequence of digital bits in a digital word.
2 more elements
A digital to analog converter comprising.
- an operational amplifier configured as an integrator with a feedback capacitor of 2C where C is a capacitance value;
- an input capacitor of substantially C;
- and
- switching circuitry to successively impose one of two reference voltages in response to a digital code word applied least-significant-bit first.
1 more element
(canceled)
(canceled)
A method comprising:
- applying a reference voltage to an input capacitor of a cyclic digital to analog converter in response to a least significant bit of a digital word;
- integrating the reference voltage to create an output voltage substantially equal to negative one half of the reference voltage;
- feeding back the output voltage to the input capacitor;
- and
- repeating the applying, integrating, and feeding back operations for remaining bits of the digital word applied from least-significant-bit to most-significant-bit.
2 more elements
(canceled)
An electronic system comprising:
- an antenna;
- and
- an integrated circuit to operate on signals received by the antenna, the integrated circuit including a port circuit having a digital to analog converter that includes an amplifier, a first capacitor coupled to an input node of the amplifier, a second capacitor coupled between the input node of the amplifier and an output node of the amplifier, wherein the second capacitor has a capacitance value substantially twice a capacitance value of the first capacitor, and at least one switching element coupled to the first capacitor, wherein the switching element is coupled to be responsive to a least-significant-bit first sequence of digital bits in a digital word.
Dependencies are inferred from the claim text.