Flip-flop circuit
AssigneeSanyo Electric Co., Ltd.
InventorHideaki Miyamoto
Life of this patent
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Abstract
A flip-flop circuit capable of inhibiting current consumption as well as the circuit scale from increase is provided. This flip-flop circuit comprises a first latch circuit including first and second inverter circuits. A first power supply line capable of switching a supplied potential between a fixing potential supplied for fixing the potentials of output nodes of the first and second inverter circuits and a floating potential supplied for floating the potentials of the output nodes of the first and second inverter circuits is connected to the first latch circuit.
Claims19
A flip-flop circuit comprising a first latch circuit including a first inverter circuit and a second inverter circuit as well as a first equalizer circuit equalizing the potential of an output node of said first inverter circuit and the potential of an output node of said second inverter circuit with each other, wherein a first power supply line capable of switching a supplied potential between a fixing potential supplied for fixing the potential of said output node of said first inverter circuit and the potential of said output node of said second inverter circuit and a floating potential supplied for floating the potential of said output node of said first inverter circuit and the potential of said output node of said second inverter circuit is connected to said first latch circuit.
Dependencies are inferred from the claim text.