Back to results
US 2006/0138670 A1Published application
Method of forming copper line in semiconductor device
OwnerJune Leeinventor
Life of this patent
Estimating the term…
Abstract
A method of forming a copper line in a semiconductor device may enhance reliability of the copper line. The method includes the steps of forming a trench in a substrate; forming a copper layer filling the trench; planarizing the copper layer with respect to the trench; annealing the planarized copper layer; and forming a silicide layer in a surface region of the planarized copper layer.
Claims20
A method of forming a copper line in a semiconductor device, comprising:
- forming a trench in a substrate;
- forming a copper layer filling the trench;
- planarizing the copper layer with respect to the trench;
- annealing the planarized copper layer;
- and
- forming a silicide layer in a surface region of the planarized copper layer.
3 more elements
A semiconductor device, comprising:
- a dielectric layer having a trench;
- a planarized copper layer filling the trench;
- a silicide layer in a surface region of said planarized copper layer.
Dependencies are inferred from the claim text.