Microelectronic packages using a ceramic substrate having a window and a conductive surface region

A microelectronic package, comprising:

• a microelectronic device having a substantially planar front surface and a plurality of electrical contacts thereon;
• a unitary ceramic substrate having
• a first substantially planar surface,
• a second surface opposing first surface,
• a window extending from a first opening on the first surface along a side wall to a second opening on the second surface, and
• a metal coating on the side wall and/or the second substrate surface;
• and
• +P2
• a plurality of terminals,
• wherein the substrate is located between the device and the terminals such that the first surface of the substrate faces the front surface of the device, the first opening is aligned with at least one contact on the front device surface, and the at least one device contact is in electrical communication with at least one terminal through the window via a lead or wire bond to the conductive region.

A wafer-scale microelectronic assembly, comprising:

• a wafer comprising an array of microelectronic devices each having a coplanar front surface and a plurality of electrical contacts thereon;
• and
• a unitary ceramic substrate having
• a first substantially planar surface
• a second surface opposing first surface,
• a plurality of windows each having varied cross-sectional areas extending from a first opening on the first surface along a side wall to a second opening on the second surface, and
• a conductive region on at least a portion of each side wall,
• wherein the first surface of the substrate faces the front device surfaces, and each first opening is aligned with electrical contacts on a different device.

A wafer-scale microelectronic assembly, comprising:

• a wafer comprising an array of microelectronic devices each having a coplanar front surface and a plurality of electrical contacts thereon;
• and
• a unitary ceramic substrate having
• a first substantially planar surface
• a second surface opposing first surface,
• a window having varied cross-sectional areas extending from a first opening on the first surface along a side wall to a second opening on the second surface, and
• a conductive region on each side wall,
• wherein the first surface of the substrate faces the front surface of the device, and the first opening is aligned with at least one electrical contact on each different device.

A wafer-scale microelectronic assembly, comprising:

• a wafer having a diameter of at least 200 mm comprising an array of microelectronic devices each having a coplanar front surface and a plurality of electrical contacts thereon;
• and
• a unitary ceramic substrate having
• a first substantially planar surface
• a second surface opposing first surface, and
• a window having varied cross-sectional areas extending from a first opening on the first surface along a side wall to a second opening on the second surface,
• wherein the substrate is positioned such that the first surface of the substrate faces the front surface of the device, each first opening is aligned with at least one electrical contact on different device, and the substrate and the device have coefficients of thermal expansion that differs by no more than about 0.1 ppm/°C.

A method for forming a microelectronic package, comprising:

• (a) providing
• a microelectronic device having a substantially planar front surface and a plurality of electrical contacts thereon, and
• a unitary ceramic substrate having a first substantially planar surface, a second surface opposing first surface, a window having varied cross-sectional areas and extending from a first opening on the first surface along a side wall to a second opening on the second surface, and a conductive region on the side wall,
• wherein the first surface of the substrate faces the front surface of the device and the first opening is aligned with at least one contact on the front device surface;
• and
• (b) establishing electrical communication between at least one contact and the conductive region through the first opening.

A method for forming a microelectronic assembly, comprising:

• (a) providing
• a wafer comprising an array of microelectronic device each having a coplanar front surface and a plurality of electrical contacts thereon, and
• a unitary ceramic substrate having a first substantially planar surface, a second surface opposing first surface, an array of windows each corresponding to a different microelectronic device, having varied cross-sectional areas, and extending from a first opening on the first surface along a side wall to a second opening on the second surface, and a conductive region on each side wall,
• wherein the first surface of the substrate faces the front surfaces of the devices and each first opening is aligned with contacts on the front surface of the corresponding microelectronic device;
• and
• (b) establishing electrical communication between at least one contact for each device and the conductive region on the side wall of the window corresponding to each device, thereby forming a microelectronic assembly.