Semiconductor wafer having a semiconductor layer and an electrically insulating layer beneath it, and process for producing it
AssigneeSiltronic AG
InventorsDirk Dantz, Andreas Huber, Brian Murphy, Reinhold Wahlich
Life of this patent
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Abstract
The invention relates to a semiconductor wafer, which, at its surface comprises a semiconductor surface layer with a thickness in the range from 3 nm to 200 nm having no hole defects, and which comprises an adjoining electrically insulating layer beneath the semiconductor surface layer.
Claims20
A semiconductor wafer comprising a semiconductor surface layer with a thickness in the range of from 3 nm to 200 nm and having no hole defects, and an adjoining electrically insulating layer between said semiconductor surface layer and a semiconductor substrate.
A process for eliminating hole defects in a wafer comprising a semiconductor wafer with a semiconductor surface layer and an adjoining electrically insulating layer beneath it, comprising heat treating the wafer at a temperature in the range from 750° C. to 1,300° C. under an inert or reducing atmosphere, the atmosphere, at some time during the heat treating containing a gaseous compound of the semiconductor material, and depositing semiconductor material on the surface of the semiconductor layer, wherein the thickness of the semiconductor layer following the heat treatment does not differ significantly from the thickness of the semiconductor layer before the heat treatment, and hole defects are decreased in the surface layer.
Dependencies are inferred from the claim text.