P-channel power MIS field effect transistor and switching circuit
AssigneesTadahiro Ohmi, Yazaki Corporation
InventorsTadahiro Ohmi, Akinobu Teramoto, Hiroshi Akahori, Keiichi Nii, Takanori Watanabe
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Abstract
In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.
Claims47
A P-channel power MIS field effect transistor which comprises a substrate having a silicon region whose surface is substantially a (110) plane, a gate insulation film formed on the surface, and a gate electrode formed on said gate insulation film, and in which said silicon region is used at least as a channel,
- wherein at least a contact portion of said gate insulation film, which is in contact with the surface of said silicon region, contains argon, krypton, or xenon, and a source-to-gate breakdown voltage of the P-channel MIS field effect transistor is not less than 10 V.
A P-channel power MIS field effect transistor which comprises a substrate having a silicon region whose surface is substantially a (110) plane, a gate insulation film formed on the surface, and a gate electrode formed on said gate insulation film, and in which said silicon region is used at least as a channel,
- wherein a surface roughness of the silicon surface is not more than 0.15 nm when expressed by a central line average roughness (Ra), and a source-to-gate breakdown voltage is not less than 10 V.
A switching circuit wherein a power supply is directly or indirectly connected to one of a source and drain of a P-channel power MIS field effect transistor a load is connected to the other of the source and drain, and means for applying a driving signal for turning on or off the P-channel power MIS field effect transistor is connected to a gate, and wherein the P-channel power MIS field effect transistor comprises:
- a substrate having a silicon region whose surface is substantially a (110) plane, a gate insulation film formed on the surface, and a gate electrode formed on said gate insulation film, and in which said silicon region is used at least as a channel,
- wherein at least a contact portion of said gate insulation film, which is in contact with the surface of said silicon region, contains argon, krypton, or xenon, and a source-to-gate breakdown voltage of the P-channel MIS field effect transistor is not less than 10 V.
A switching circuit comprising:
- a power supply is directly or indirectly connected to one of a source and drain of a P-channel power MIS field effect transistor, a load is connected to the other of the source and drain, and means for applying a driving signal for turning on or off the P-channel power MIS field effect transistor is connected to a gate, and
- wherein the P-channel power MIS field effect transistor comprises a substrate having a silicon region whose surface is substantially a (110) plane, a gate insulation film formed on the surface, and a gate electrode formed on said gate insulation film, and in which said silicon region is used at least as a channel,
- wherein a surface roughness of the silicon surface is not more than 0.15 nm when expressed by a central line average roughness (Ra), and a source-to-gate breakdown voltage is not less than 10 V.
Dependencies are inferred from the claim text.