Semiconductor device and method of manufacturing the same

A semiconductor device, comprising:

• a semiconductor substrate of a first conduction type serving as a common drain to a plurality of power MISFET cells;
• a plurality of pillar regions formed into strips in section on said semiconductor substrate, including
• semiconductor regions of said first conduction type each having a lower impurity concentration than that of said semiconductor substrate, and
• semiconductor regions of a second conduction type each having both sides sandwiched between said semiconductor regions of said first conduction type;
• a source diffusion layer of said first conduction type formed above said semiconductor region of said second conduction type of said plurality of pillar regions;
• a gate insulator film formed over a region sandwiched between said source diffusion layer and said semiconductor region of said first conduction type of said pillar regions;
• a gate electrode formed on said gate insulator film;
• and
• an isolation film formed between said plurality of pillar regions to isolate said pillar regions from each other.
• wherein said semiconductor region of said first conduction type has a higher carrier concentration at a lower portion close to said semiconductor substrate than that of said semiconductor region of said second conduction type, and said semiconductor region of said second conduction type has a higher carrier concentration at an upper portion opposite to said semiconductor substrate than that of said semiconductor region of said first conduction type of said pillar regions.

A method of manufacturing a semiconductor device, comprising the steps of:

• forming a semiconductor layer of a first conduction type having impurity concentrations gradually decreasing in proportion as approaching from the bottom to the top;
• forming trenches at a certain interval in said semiconductor layer;
• applying ion implantation to implant an impurity of said first conduction type and an impurity of a second conduction type having a larger diffusion coefficient than that of said impurity of said first conduction type into sides of said trenches, thereby changing said semiconductor layer sandwiched between said trenches into a pillar layer of said second conduction type extending in the vertical direction through the central portion and a pillar layer of said first conduction type extending in the vertical direction and having regions sandwiching said pillar layer of said second conduction type therebetween;
• forming a device isolation film in said trenches;
• forming a source diffusion layer of said first conduction type above said pillar layer of said second conduction type;
• forming a gate insulator film over a region sandwiched between said source diffusion layer and said pillar layer of said second conduction type;
• and
• forming a gate electrode on said gate insulator film.