Semiconductor memory device and method for manufacturing the same
AssigneeSeiko Epson Corporation
InventorsYukihiro Iwasaki, Tatsuo Sawasaki, Kazumasa Hasegawa
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a substrate having a semiconductor element formed thereon, an interlayer dielectric layer formed above the substrate, a plug formed in the interlayer dielectric layer, an adhesion layer formed in a region including a region above the plug, and a ferroelectric capacitor formed above the adhesion layer and having a lower electrode, a ferroelectric layer and an upper electrode, wherein an oxidized layer is formed in a part of the adhesion layer at a side wall thereof.
Claims7
A semiconductor memory device comprising:
- a substrate having a semiconductor element formed thereon;
- an interlayer dielectric layer formed above the substrate;
- a plug formed in the interlayer dielectric layer;
- an adhesion layer formed in a region including a region above the plug;
- and
- a ferroelectric capacitor formed above the adhesion layer and having a lower electrode, a ferroelectric layer and an upper electrode,
- wherein an oxidized layer is formed in a part of the adhesion layer at a side wall thereof.
A method for manufacturing a semiconductor memory device, comprising:
- (a) forming an interlayer dielectric layer above a substrate having a semiconductor element formed thereon;
- (b) forming a plug in the interlayer dielectric layer;
- (c) forming in a region including a region above the plug a laminated body including an adhesion layer, a lower electrode, a ferroelectric layer and an upper electrode;
- (d) forming a ferroelectric capacitor by patterning the laminated body;
- and
- (e) forming an oxidized layer in a part of the adhesion layer at a side wall thereof by conducting an anneal treatment in an oxygen atmosphere.
Dependencies are inferred from the claim text.