CMOS image sensor and method of fabricating the same
AssigneeDongbu Electronics Co., Ltd.
InventorChang Han
Life of this patent
Estimating the term…
Abstract
A CMOS image sensor and method for fabricating the same, wherein the CMOS image sensor has minimized dark current at the boundary area between a photodiode and an isolation layer. The present invention includes a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping area surrounding the isolation area and a dielectric layer formed between the isolation layer and the first-conductivity-type doping area, wherein the first-conductivity-type doping area and the dielectric layer are located between the isolation layer and a second-conductivity-type diffusion area.
Claims11
A CMOS image sensor, comprising:
- a first-conductivity-type semiconductor substrate defined by an active area and a device isolation area;
- an isolation layer formed in the device isolation area of the substrate;
- a second-conductivity-type diffusion area formed in the active area of the substrate;
- a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping area surrounding the isolation layer;
- and
- a dielectric layer formed between the isolation layer and the first-conductivity-type doping area,
- wherein the first-conductivity-type doping area and the dielectric layer are located between the isolation layer and the second-conductivity-type diffusion area.
A method of fabricating a CMOS image sensor, comprising the steps of:
- forming a pad oxide layer and a nitride layer sequentially over a first-conductivity-type semiconductor substrate defined by an active area and a device isolation area;
- selectively etching the nitride layer to form an opening through which a part of the pad oxide layer is exposed;
- forming a first-conductivity-type doping area using the selectively etched nitride layer as a mask;
- forming spacers on sidewalls of the opening;
- selectively etching the exposed part of the pad oxide layer and underlying substrate using the etched nitride layer and the spacers as a mask to form a trench;
- forming a dielectric layer in the trench;
- forming an isolation layer on the dielectric layer to fill the trench;
- removing the spacers, the nitride layer and the pad oxide layer;
- and
- forming a second-conductive-type diffusion area in the active area of the substrate in such a way that between the second-conductive-type diffusion area and the isolation layer is a space corresponding to the first-conductive-type doping area and the dielectric layer.
Dependencies are inferred from the claim text.