Prevention of data loss due to power failure

An apparatus for preventing data loss due to power failure in a computing system, comprising:

• a memory to store data accessible by components in the computing system;
• power control logic to detect a power failure;
• a power failure handling mechanism to complete pending memory write operations and to flush dirty cache lines to the memory, when informed by the power control logic of the power failure;
• and
• a battery pack to supply power to the memory to refresh the data in the memory to prevent data loss in the memory, after the pending memory write operations are completed and the dirty cache lines are flushed to the memory.

A computing system, comprising:

• at least one processor;
• a power supply to supply power to components in the computing system;
• a memory to store data accessible by the at least one processor;
• and
• a battery pack to supply power to the memory to refresh the data in the memory after a power failure occurs.

An article comprising a storage medium having stored thereon instructions that, when accessed by a processor result in the following:

• detecting a power failure in the computing system;
• completing pending memory write operations and flushing dirty cache lines to a memory after the power failure is detected;
• and
• putting the computing system in a loss-prevention state after the pending write operations are completed and the dirty cache lines are flushed to the memory, the loss-prevention state comprises a state under which data in the memory is refreshed using batteries, the memory including volatile memory, the volatile memory including write-back caches in at least one of a processor and a disk drive.