Apparatus and method for accessing registers in a processor
AssigneeVIA-Cyrix, Inc.
InventorCharles Shelor
Life of this patent
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Abstract
The present invention is generally directed to an apparatus and method for accessing registers within a processor. In accordance with one embodiment, an apparatus and method are provided for a processor in which at least two separate indicia (such as register select lines, register bank identifiers, processor mode identifiers, etc.) are utilized to uniquely identify and access a processor register. In accordance with this embodiment, bit lines of the separate indicia are encoded into a single, mapped set of signal lines, and these encoded signal lines are used to access the register.
Claims13
1-7. (canceled)
A processor comprising:
- a plurality w of registers arranged in a banked configuration, such that fewer than w registers are program-accessible to any single instruction operation;
- logic configured to carry a register-select value defined by m bits;
- logic configured to carry a register-bank value defined by n bits;
- and
- encoder logic configured to encode register-select value with the register-bank value to generate a mapped value defined by p bits output from the encoder logic, where p is less than m+n, wherein a mapped value carried on the p bits uniquely identifies a register among the plurality w of registers.
14-18. (canceled)
In a processor having w registers arranged in a banked configuration, such that fewer than w registers are accessible to any single instruction operation, a method comprising:
- encoding a bank-select value carried on a plurality n of bank-identifying bit with a register value carried on a plurality m of register-select bits to produce a mapped value carried on a plurality p of bits, wherein p is less than the sum of n+m;
- and
- using the encoded plurality of bits to uniquely access any of the w registers.
Dependencies are inferred from the claim text.