Media memory system
AssigneeIntel Corporation
InventorsBrent Baxter, Prashant Sethi, Clifford Hall, William Clifford
Life of this patent
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Abstract
A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
Claims19
A method, comprising:
- matching primary processor address translations to at least one secondary processor address translation;
- providing concurrent shared memory access to at least one secondary processor through separate translation table information;
- and
- exchanging real-time data between the primary and at least one secondary processor though the shared memory.
A machine-accessible medium including instructions that, when executed, cause a machine to:
- match first processor address translations to at least one secondary processor address translation;
- enable common memory access to at least one secondary processor through dedicated translation table information;
- and
- share data between the first and at least one secondary processor though the common memory.
A system, comprising:
- a memory;
- and
- a controller to match primary processor address translations to at least one secondary processor address translation, provide concurrent shared access to the memory to at least one secondary processor through separate translation table information, and exchange real-time data between the primary and at least one secondary processor though the memory.
An apparatus, comprising:
- an address translator to match primary processor address translations to at least one secondary processor address translation, provide concurrent shared access to the memory to at least one secondary processor through separate translation table information, and exchange real-time data between the primary and at least one secondary processor though the memory.
Dependencies are inferred from the claim text.