Context save method, information processor and interrupt generator
OwnerYasushi Takemoriinventor
Life of this patent
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Abstract
A context save method, an information processor and an interrupt generator for restoring, after a reset of a CPU, CPU context information such as the interrupt acceptance state of the CPU before the CPU reset. An interrupt controller stores CPU context information set in a CPU in a memory before resetting the CPU. After the reset of the CPU, the interrupt controller reads out the CPU context information stored in the memory. The interrupt controller feeds interrupt acceptance information contained in the CPU context information to the interrupt generator. The interrupt generator generates an interrupt corresponding to the input information. Besides, the interrupt controller sets the CPU context information except for the interrupt acceptance information in the CPU.
Claims3
A context save method comprising the steps of
- storing CPU context information set in a CPU in a memory;
- reading out the CPU context information stored in the memory after the CPU is reset;
- feeding interrupt acceptance information contained in the CPU context information read out of the memory to an interrupt generator to generate an interrupt corresponding to the interrupt acceptance information;
- and
- setting the CPU context information except for the interrupt acceptance information in the CPU.
An information processor comprising:
- a memory for storing CPU context information;
- an information reader for reading out the CPU context information stored in the memory after the CPU is reset;
- an information input section for receiving as input interrupt acceptance information contained in the CPU context information read out of the memory;
- an interrupt issuer for issuing an interrupt corresponding to the interrupt acceptance information;
- and
- an information set section for setting the CPU context information except for the interrupt acceptance information in the CPU.
An interrupt generator comprising:
- an information input section for receiving as input interrupt acceptance information contained in CPU context information that is stored in a memory before a CPU reset and read out of the memory after the CPU reset;
- and
- an interrupt issuer for issuing an interrupt corresponding to the interrupt acceptance information.
Dependencies are inferred from the claim text.