System, method and storage medium for a multi-mode memory buffer device
AssigneeInternational Business Machines Corporation
InventorsKevin Gower, Mark Kellogg
Life of this patent
Estimating the term…
Abstract
A multi-mode memory buffer device for use in various memory subsystem structures. The buffer device includes a packetized multi-transfer interface which is redriven to permit connection between a first memory assembly and cascaded memory assemblies. The buffer device also includes a memory interface adapted to connect to either a second memory assembly or directly to memory devices.
Claims31
A buffer device comprising:
- a packetized multi-transfer interface adapted to connect a first memory assembly to a cascaded interconnect system;
- and
- a bus converter adapted to connect a second memory assembly to a parallel memory interface bus.
A programmable memory address, command and data buffer device comprising:
- first selection means to adapt the buffer device for direct attachment to a memory module to enable a buffered memory module mode of operation;
- and
- second selection means to adapt the buffer device for connection to at least one of an unbuffered memory module and a registered memory module to enable a bus converter mode of operation.
A bus to bus converter device having more than one operating mode, the device comprising:
- a first interface adapted for direct attachment to a memory module for use when the device is operating in a first mode;
- and
- a second interface adapted for attachment to a system board or card for use when the device is operating in a second mode, wherein the system board or card is connected to at least one of an unbuffered memory module and a registered memory module.
A bus to bus converter device having more than one operating mode, the device comprising
- an input port for receiving a serialized packetized bus:
- instructions to convert the serialized packetized bus into a parallel memory bus;
- a first interface adapted for direct attachment to a memory module;
- and
- a second interface adapted for attachment to a system board or card, wherein the parallel memory bus is transmitted to the system board or card via the second interface and the system board or card is connected to at least one of an unbuffered memory module and a registered memory module.
A method for providing a buffered memory device with multiple operating modes, the method comprising:
- receiving an input signal at the buffered memory device;
- determining a mode associated with the input signal, said mode identifying a type of memory assembly;
- and
- transmitting the input signal to a memory assembly in a format corresponding to the mode.
A storage medium encoded with machine readable computer program code for providing a buffered memory device with multiple operating modes, the storage medium including instructions for causing a computer to implement a method comprising:
- receiving an input signal at the buffered memory device;
- determining a mode associated with the input signal, said mode identifying a type of memory assembly;
- and
- transmitting the input signal to a memory module in a format corresponding to the mode.
Dependencies are inferred from the claim text.