Loading patent…
AssigneeKoninklijke Philips Electronics N.V.
InventorsRodger Schuttert, Franciscus De Jong
Estimating the term…
An integrated circuit device has boundary scan structure coupled between a test input (TDI) and the test output (TDO). The test register structure is used to shift information from the test input to a test output. Test data is transported from the input to the output by shifting. The test shift register structure contains a data shift part (106) coupled to connections (12) for a functional circuit under test. In parallel with the data shift part is an instruction shift structure (102, 104). By means of test control signals it is controlled whether instruction information travels from the test input to the test output through the instruction shift part or whether data travels from the test input to the test output through the data shift the instruction shift part controls operation of the device in a test mode. A sensor (14) is provided for sensing a physical operating parameter of the device. The sensor has an output (18) coupled to the shift register structure (102) for feeding a sensing result to the test output from the instruction shift part. This form of making a sensing result accessible is preferably applied to a parameter whose value is indicative of a risk of damage to the device, such as temperature. This makes it possible to detect threatening parameter values quickly.
An integrated circuit device comprising
A method of testing an electronic circuit that contains a plurality of integrated circuit devices each with a test shift register structure that contains an instruction shift path and a data shift path in parallel, for alternatively selectably shifting data or instruction information, the test shift register structures of respective ones of the devices being arranged in a cascade, the method comprising
An electronic apparatus with a circuit module that contains a plurality of integrated circuit devices each with a test shift register structure that contains an instruction shift path and a data shift path Fin parallel, for alternatively selectably shifting data or instruction information, that data path being coupled for receiving and outputting data from and to a functional circuit, the test shift register structures of respective ones of the devices being arranged in a cascade, wherein at least one of the integrated circuit devices comprises
Dependencies are inferred from the claim text.