Method of forming storage node of capacitor

Abstract

A method of forming a storage node of a capacitor includes defining a cell region and a peripheral circuit region in a semiconductor substrate. An interlayer insulating layer is formed on the semiconductor substrate of the cell region and the peripheral circuit region. Buried contact plugs are formed to penetrate the interlayer insulating layer of the cell region. A molding layer is formed on the semiconductor substrate of the cell region and the peripheral circuit region. The molding layer of the cell region is patterned, thereby forming storage node holes exposing the buried contact plugs. A conformal storage node layer is formed on the semiconductor substrate having the storage node holes. A photosensitive layer is formed on the semiconductor substrate having the storage node layer. At this time, the photosensitive layer in the cell region is lower in height than the photosensitive layer in the peripheral circuit region. The semiconductor substrate is exposed using a reticle having a scattering bar. The scattering bar of the reticle is positioned to correspond with the cell region. An exposed portion of the photosensitive layer is removed by developing the semiconductor substrate, thereby partially exposing the storage node layer. The photosensitive layer in the storage node holes is therefore maintained. An etch-back is performed on the semiconductor substrate having the exposed storage node layer, thereby separating storage nodes.

Dependencies are inferred from the claim text.