Mask for forming landing plug contact hole and plug forming method using the same
AssigneeHynix Semiconductor Inc.
InventorDong Koo
Life of this patent
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Abstract
Disclosed herein are a mask for forming a landing plug contact hole to vertically expose an active region of a semiconductor substrate to a bit line or storage node contact, and a plug forming method using the same. Through the use of the crescent-shaped masks, it is possible to increase the critical dimension at a lower end of the resultant contact hole in contact with an active region of a semiconductor substrate, thereby enabling exposure of a wider area of the active region to be connected with the bit line or storage node contact.
Claims4
A mask for forming landing plug contact holes to vertically expose active regions of a semiconductor substrate to bit lines or storage node contacts,
- wherein the mask has a crescent bowed shape such that one of the contact holes, associated with a bit line, is offset from the other contact holes, located at opposite sides thereof and associated with the storage node contacts, by a distance.
A method of forming landing plugs in an inter-insulation layer comprising:
- forming the inter-insulation layer throughout an upper surface of a semiconductor substrate where certain semiconductor diodes are defined;
- forming contact holes in the inter-insulation layer by means of crescent shaped masks to vertically expose active regions of the semiconductor substrate to the bit lines or storage node contacts;
- and
- gap-filling a conductive layer in the landing plug contact holes and flattening the conductive layer, thereby forming landing plugs for embedding the contact holes to vertically connect the active regions with the bit lines or storage node contacts.
Dependencies are inferred from the claim text.