Method for making a neo-layer comprising embedded discrete components
AssigneeIrvine Sensors Corporation
InventorSambo He
Life of this patent
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Abstract
A stackable neo-layer comprising one or more embedded discrete electrical components is provided. A plurality of conductive traces, some of which terminate at a peripheral edge of the layer, are formed on sacrificial substrate in a series of process steps and discrete electrical components such as thick film components or wire bonded components are attached thereto. An under-bump metal process step is disclosed and provides for solder attachment at desired contact pad locations. The layer is encapsulated in a potting material and thinned to provide a thin, stackable layer. When assembled into a stack of layers, the electrically conductive traces terminating at the edge of the layer can be electrically connected by means of electroplating using a T-connect.
Claims16
A method for making a stackable layer comprising the steps of:
- providing a sacrificial substrate having a first surface and a second surface,
- defining a first dielectric layer on said first surface,
- defining a plurality of electrically conductive traces on said first dielectric layer,
- defining a second dielectric layer upon said first dielectric layer whereby said electrically conductive traces are encapsulated therein,
- removing predetermined portions of said second dielectric layer to expose portions of said electrically conductive traces to define a plurality of contact pads,
- electrically connecting at least one discrete electrical component to at least one of said contact pads,
- encapsulating said second dielectric layer and said at least one discrete electrical component in a potting material,
- removing said sacrificial layer to define a component surface and a test surface, and,
- defining one or more vias in said test surface to define a test contact pad.
A method for making a stackable layer comprising the steps of:
- providing a sacrificial substrate having a first surface and a second surface,
- defining a first dielectric layer on said first surface,
- defining a plurality of electrically conductive traces on said first dielectric layer,
- defining a second dielectric layer upon said first dielectric layer whereby said traces are encapsulated therein,
- removing predetermined portions of said second dielectric layer to define a plurality of contact pads,
- providing an under-bump metal on at least one of said contact pads to define an under-bump metal contact pad
- electrically connecting at least one discrete electrical component to at least one of said under-bump metal contact pads by means of a solder connection,
- encapsulating said at least one discrete electrical component in a potting material,
- removing said sacrificial layer to define a component surface and a test surface, and,
- defining one or more vias in said test surface to define a test contact pad.
Dependencies are inferred from the claim text.